+15
−5
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There could be cases where a simultaneous clk_disable and clk_set_rate on
the same rcg could result in a wrong recalc rate. So for shared rcgs
get the pre_div value based on the current frequency from the frequency
table.
Change-Id: I575855a3a054bb405f54e1ae0d5feba755aada18
Signed-off-by:
Taniya Das <tdas@codeaurora.org>