Loading drivers/usb/dwc3/gadget.c +10 −12 Original line number Diff line number Diff line Loading @@ -421,7 +421,16 @@ static void dwc3_free_trb_pool(struct dwc3_ep *dep) if (dep->endpoint.ep_type == EP_TYPE_GSI) return; if (dep->trb_pool && dep->trb_pool_dma) { /* * Clean up ep ring to avoid getting xferInProgress due to stale trbs * with HWO bit set from previous composition when update transfer cmd * is issued. */ if (dep->number > 1 && dep->trb_pool && dep->trb_pool_dma) { memset(&dep->trb_pool[0], 0, sizeof(struct dwc3_trb) * dep->num_trbs); dbg_event(dep->number, "Clr_TRB", 0); dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM, dep->trb_pool, dep->trb_pool_dma); Loading Loading @@ -723,17 +732,6 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep) (dep->number & 1) ? "in" : "out"); } /* * Clean up ep ring of non-control endpoint to avoid getting xferInProgress * due to stale trbs with HWO bit set from previous composition when update * transfer cmd is issued. */ if (dep->number > 1 && dep->trb_pool) { memset(&dep->trb_pool[0], 0, sizeof(struct dwc3_trb) * dep->num_trbs); dbg_event(dep->number, "Clr_TRB", 0); } return 0; } Loading Loading
drivers/usb/dwc3/gadget.c +10 −12 Original line number Diff line number Diff line Loading @@ -421,7 +421,16 @@ static void dwc3_free_trb_pool(struct dwc3_ep *dep) if (dep->endpoint.ep_type == EP_TYPE_GSI) return; if (dep->trb_pool && dep->trb_pool_dma) { /* * Clean up ep ring to avoid getting xferInProgress due to stale trbs * with HWO bit set from previous composition when update transfer cmd * is issued. */ if (dep->number > 1 && dep->trb_pool && dep->trb_pool_dma) { memset(&dep->trb_pool[0], 0, sizeof(struct dwc3_trb) * dep->num_trbs); dbg_event(dep->number, "Clr_TRB", 0); dma_free_coherent(dwc->dev, sizeof(struct dwc3_trb) * DWC3_TRB_NUM, dep->trb_pool, dep->trb_pool_dma); Loading Loading @@ -723,17 +732,6 @@ static int __dwc3_gadget_ep_disable(struct dwc3_ep *dep) (dep->number & 1) ? "in" : "out"); } /* * Clean up ep ring of non-control endpoint to avoid getting xferInProgress * due to stale trbs with HWO bit set from previous composition when update * transfer cmd is issued. */ if (dep->number > 1 && dep->trb_pool) { memset(&dep->trb_pool[0], 0, sizeof(struct dwc3_trb) * dep->num_trbs); dbg_event(dep->number, "Clr_TRB", 0); } return 0; } Loading