Loading Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 139 SUBLEVEL = 140 EXTRAVERSION = NAME = Blurry Fish Butt Loading arch/arm/boot/dts/imx6q.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -95,7 +95,7 @@ clocks = <&clks IMX6Q_CLK_ECSPI5>, <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; dmas = <&sdma 11 7 1>, <&sdma 12 7 2>; dmas = <&sdma 11 8 1>, <&sdma 12 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; Loading arch/s390/kernel/entry.S +2 −2 Original line number Diff line number Diff line Loading @@ -1170,7 +1170,7 @@ cleanup_critical: jl 0f clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end jl .Lcleanup_load_fpu_regs 0: BR_EX %r14 0: BR_EX %r14,%r11 .align 8 .Lcleanup_table: Loading Loading @@ -1200,7 +1200,7 @@ cleanup_critical: ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE lctlg %c1,%c1,__LC_USER_ASCE # load primary asce larl %r9,sie_exit # skip forward to sie_exit BR_EX %r14 BR_EX %r14,%r11 #endif .Lcleanup_system_call: Loading arch/x86/kernel/cpu/mcheck/mce.c +34 −17 Original line number Diff line number Diff line Loading @@ -980,11 +980,12 @@ void do_machine_check(struct pt_regs *regs, long error_code) int i; int worst = 0; int severity; /* * Establish sequential order between the CPUs entering the machine * check handler. */ int order; int order = -1; /* * If no_way_out gets set, there is no safe way to recover from this * MCE. If mca_cfg.tolerant is cranked up, we'll try anyway. Loading @@ -1000,7 +1001,12 @@ void do_machine_check(struct pt_regs *regs, long error_code) char *msg = "Unknown"; u64 recover_paddr = ~0ull; int flags = MF_ACTION_REQUIRED; int lmce = 0; /* * MCEs are always local on AMD. Same is determined by MCG_STATUS_LMCES * on Intel. */ int lmce = 1; /* If this CPU is offline, just bail out. */ if (cpu_is_offline(smp_processor_id())) { Loading Loading @@ -1039,17 +1045,23 @@ void do_machine_check(struct pt_regs *regs, long error_code) kill_it = 1; /* * Check if this MCE is signaled to only this logical processor * Check if this MCE is signaled to only this logical processor, * on Intel only. */ if (m.mcgstatus & MCG_STATUS_LMCES) lmce = 1; else { if (m.cpuvendor == X86_VENDOR_INTEL) lmce = m.mcgstatus & MCG_STATUS_LMCES; /* * Go through all the banks in exclusion of the other CPUs. * This way we don't report duplicated events on shared banks * because the first one to see it will clear it. * If this is a Local MCE, then no need to perform rendezvous. * Local machine check may already know that we have to panic. * Broadcast machine check begins rendezvous in mce_start() * Go through all banks in exclusion of the other CPUs. This way we * don't report duplicated events on shared banks because the first one * to see it will clear it. */ if (lmce) { if (no_way_out) mce_panic("Fatal local machine check", &m, msg); } else { order = mce_start(&no_way_out); } Loading Loading @@ -1128,12 +1140,17 @@ void do_machine_check(struct pt_regs *regs, long error_code) no_way_out = worst >= MCE_PANIC_SEVERITY; } else { /* * Local MCE skipped calling mce_reign() * If we found a fatal error, we need to panic here. * If there was a fatal machine check we should have * already called mce_panic earlier in this function. * Since we re-read the banks, we might have found * something new. Check again to see if we found a * fatal error. We call "mce_severity()" again to * make sure we have the right "msg". */ if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) mce_panic("Machine check from unknown source", NULL, NULL); if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) { mce_severity(&m, cfg->tolerant, &msg, true); mce_panic("Local fatal machine check!", &m, msg); } } /* Loading arch/x86/kernel/kprobes/core.c +20 −22 Original line number Diff line number Diff line Loading @@ -412,25 +412,38 @@ void free_insn_page(void *page) module_memfree(page); } /* Prepare reljump right after instruction to boost */ static void prepare_boost(struct kprobe *p, int length) { if (can_boost(p->ainsn.insn, p->addr) && MAX_INSN_SIZE - length >= RELATIVEJUMP_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump(p->ainsn.insn + length, p->addr + length); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } static int arch_copy_kprobe(struct kprobe *p) { int ret; int len; set_memory_rw((unsigned long)p->ainsn.insn & PAGE_MASK, 1); /* Copy an instruction with recovering if other optprobe modifies it.*/ ret = __copy_instruction(p->ainsn.insn, p->addr); if (!ret) len = __copy_instruction(p->ainsn.insn, p->addr); if (!len) return -EINVAL; /* * __copy_instruction can modify the displacement of the instruction, * but it doesn't affect boostable check. */ if (can_boost(p->ainsn.insn, p->addr)) p->ainsn.boostable = 0; else p->ainsn.boostable = -1; prepare_boost(p, len); set_memory_ro((unsigned long)p->ainsn.insn & PAGE_MASK, 1); Loading Loading @@ -895,21 +908,6 @@ static void resume_execution(struct kprobe *p, struct pt_regs *regs, break; } if (p->ainsn.boostable == 0) { if ((regs->ip > copy_ip) && (regs->ip - copy_ip) + 5 < MAX_INSN_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump((void *)regs->ip, (void *)orig_ip + (regs->ip - copy_ip)); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } regs->ip += orig_ip - copy_ip; no_change: Loading Loading
Makefile +1 −1 Original line number Diff line number Diff line VERSION = 4 PATCHLEVEL = 4 SUBLEVEL = 139 SUBLEVEL = 140 EXTRAVERSION = NAME = Blurry Fish Butt Loading
arch/arm/boot/dts/imx6q.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -95,7 +95,7 @@ clocks = <&clks IMX6Q_CLK_ECSPI5>, <&clks IMX6Q_CLK_ECSPI5>; clock-names = "ipg", "per"; dmas = <&sdma 11 7 1>, <&sdma 12 7 2>; dmas = <&sdma 11 8 1>, <&sdma 12 8 2>; dma-names = "rx", "tx"; status = "disabled"; }; Loading
arch/s390/kernel/entry.S +2 −2 Original line number Diff line number Diff line Loading @@ -1170,7 +1170,7 @@ cleanup_critical: jl 0f clg %r9,BASED(.Lcleanup_table+104) # .Lload_fpu_regs_end jl .Lcleanup_load_fpu_regs 0: BR_EX %r14 0: BR_EX %r14,%r11 .align 8 .Lcleanup_table: Loading Loading @@ -1200,7 +1200,7 @@ cleanup_critical: ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE lctlg %c1,%c1,__LC_USER_ASCE # load primary asce larl %r9,sie_exit # skip forward to sie_exit BR_EX %r14 BR_EX %r14,%r11 #endif .Lcleanup_system_call: Loading
arch/x86/kernel/cpu/mcheck/mce.c +34 −17 Original line number Diff line number Diff line Loading @@ -980,11 +980,12 @@ void do_machine_check(struct pt_regs *regs, long error_code) int i; int worst = 0; int severity; /* * Establish sequential order between the CPUs entering the machine * check handler. */ int order; int order = -1; /* * If no_way_out gets set, there is no safe way to recover from this * MCE. If mca_cfg.tolerant is cranked up, we'll try anyway. Loading @@ -1000,7 +1001,12 @@ void do_machine_check(struct pt_regs *regs, long error_code) char *msg = "Unknown"; u64 recover_paddr = ~0ull; int flags = MF_ACTION_REQUIRED; int lmce = 0; /* * MCEs are always local on AMD. Same is determined by MCG_STATUS_LMCES * on Intel. */ int lmce = 1; /* If this CPU is offline, just bail out. */ if (cpu_is_offline(smp_processor_id())) { Loading Loading @@ -1039,17 +1045,23 @@ void do_machine_check(struct pt_regs *regs, long error_code) kill_it = 1; /* * Check if this MCE is signaled to only this logical processor * Check if this MCE is signaled to only this logical processor, * on Intel only. */ if (m.mcgstatus & MCG_STATUS_LMCES) lmce = 1; else { if (m.cpuvendor == X86_VENDOR_INTEL) lmce = m.mcgstatus & MCG_STATUS_LMCES; /* * Go through all the banks in exclusion of the other CPUs. * This way we don't report duplicated events on shared banks * because the first one to see it will clear it. * If this is a Local MCE, then no need to perform rendezvous. * Local machine check may already know that we have to panic. * Broadcast machine check begins rendezvous in mce_start() * Go through all banks in exclusion of the other CPUs. This way we * don't report duplicated events on shared banks because the first one * to see it will clear it. */ if (lmce) { if (no_way_out) mce_panic("Fatal local machine check", &m, msg); } else { order = mce_start(&no_way_out); } Loading Loading @@ -1128,12 +1140,17 @@ void do_machine_check(struct pt_regs *regs, long error_code) no_way_out = worst >= MCE_PANIC_SEVERITY; } else { /* * Local MCE skipped calling mce_reign() * If we found a fatal error, we need to panic here. * If there was a fatal machine check we should have * already called mce_panic earlier in this function. * Since we re-read the banks, we might have found * something new. Check again to see if we found a * fatal error. We call "mce_severity()" again to * make sure we have the right "msg". */ if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) mce_panic("Machine check from unknown source", NULL, NULL); if (worst >= MCE_PANIC_SEVERITY && mca_cfg.tolerant < 3) { mce_severity(&m, cfg->tolerant, &msg, true); mce_panic("Local fatal machine check!", &m, msg); } } /* Loading
arch/x86/kernel/kprobes/core.c +20 −22 Original line number Diff line number Diff line Loading @@ -412,25 +412,38 @@ void free_insn_page(void *page) module_memfree(page); } /* Prepare reljump right after instruction to boost */ static void prepare_boost(struct kprobe *p, int length) { if (can_boost(p->ainsn.insn, p->addr) && MAX_INSN_SIZE - length >= RELATIVEJUMP_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump(p->ainsn.insn + length, p->addr + length); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } static int arch_copy_kprobe(struct kprobe *p) { int ret; int len; set_memory_rw((unsigned long)p->ainsn.insn & PAGE_MASK, 1); /* Copy an instruction with recovering if other optprobe modifies it.*/ ret = __copy_instruction(p->ainsn.insn, p->addr); if (!ret) len = __copy_instruction(p->ainsn.insn, p->addr); if (!len) return -EINVAL; /* * __copy_instruction can modify the displacement of the instruction, * but it doesn't affect boostable check. */ if (can_boost(p->ainsn.insn, p->addr)) p->ainsn.boostable = 0; else p->ainsn.boostable = -1; prepare_boost(p, len); set_memory_ro((unsigned long)p->ainsn.insn & PAGE_MASK, 1); Loading Loading @@ -895,21 +908,6 @@ static void resume_execution(struct kprobe *p, struct pt_regs *regs, break; } if (p->ainsn.boostable == 0) { if ((regs->ip > copy_ip) && (regs->ip - copy_ip) + 5 < MAX_INSN_SIZE) { /* * These instructions can be executed directly if it * jumps back to correct address. */ synthesize_reljump((void *)regs->ip, (void *)orig_ip + (regs->ip - copy_ip)); p->ainsn.boostable = 1; } else { p->ainsn.boostable = -1; } } regs->ip += orig_ip - copy_ip; no_change: Loading