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Commit 1f56f45d authored by Richard Alpe's avatar Richard Alpe Committed by Jeff Kirsher
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e1000e: clear REQ and GNT in EECD (82571 && 82572) 

Clear the REQ and GNT bit in the eeprom control register (EECD).
This is required if the eeprom is to be accessed with auto read
EERD register.

After a cold reset this doesn't matter but if PBIST MAC test was
executed before booting, the register was left in a dirty state
(the 2 bits where set), which caused the read operation to time out
and returning 0.

Reference (page 312):
http://download.intel.com/design/network/manuals/316080.pdf



Reported-by: default avatarAleksandar Igic <aleksandar.igic@dektech.com.au>
Signed-off-by: default avatarRichard Alpe <richard.alpe@ericsson.com>
Tested-by: default avatarJeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
parent 7b9f7e35

drivers/net/ethernet/intel/e1000e/82571.c

+11 −1
Original line number Original line Diff line number Diff line
@@ -999,7 +999,7 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active) 
 **/

 **/

static s32 e1000_reset_hw_82571(struct e1000_hw *hw)

static s32 e1000_reset_hw_82571(struct e1000_hw *hw)

{

{

	u32 ctrl, ctrl_ext;

	u32 ctrl, ctrl_ext, eecd;

	s32 ret_val;

	s32 ret_val;





	/*

	/*
@@ -1072,6 +1072,16 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw) 
	 */

	 */





	switch (hw->mac.type) {

	switch (hw->mac.type) {

	case e1000_82571:

	case e1000_82572:

		/*

		 * REQ and GNT bits need to be cleared when using AUTO_RD

		 * to access the EEPROM.

		 */

		eecd = er32(EECD);

		eecd &= ~(E1000_EECD_REQ | E1000_EECD_GNT);

		ew32(EECD, eecd);

		break;

	case e1000_82573:

	case e1000_82573:

	case e1000_82574:

	case e1000_82574:

	case e1000_82583:

	case e1000_82583: