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Commit 1cbc733d authored by Prashant Gaikwad's avatar Prashant Gaikwad Committed by Stephen Warren
Browse files

ARM: tegra: add clock properties to Tegra30 DT 



Add clock information to device nodes.

Signed-off-by: default avatarPrashant Gaikwad <pgaikwad@nvidia.com>
[swarren: added second clock to 3d node]
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 8d8b43da

arch/arm/boot/dts/tegra30.dtsi

+55 −1
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ 
		reg = <0x50000000 0x00024000>;

		interrupts = <0 65 0x04   /* mpcore syncpt */

			      0 67 0x04>; /* mpcore general */

		clocks = <&tegra_car 28>;



		#address-cells = <1>;

		#size-cells = <1>;
@@ -19,41 +20,50 @@ 
			compatible = "nvidia,tegra30-mpe";

			reg = <0x54040000 0x00040000>;

			interrupts = <0 68 0x04>;

			clocks = <&tegra_car 60>;

		};



		vi {

			compatible = "nvidia,tegra30-vi";

			reg = <0x54080000 0x00040000>;

			interrupts = <0 69 0x04>;

			clocks = <&tegra_car 164>;

		};



		epp {

			compatible = "nvidia,tegra30-epp";

			reg = <0x540c0000 0x00040000>;

			interrupts = <0 70 0x04>;

			clocks = <&tegra_car 19>;

		};



		isp {

			compatible = "nvidia,tegra30-isp";

			reg = <0x54100000 0x00040000>;

			interrupts = <0 71 0x04>;

			clocks = <&tegra_car 23>;

		};



		gr2d {

			compatible = "nvidia,tegra30-gr2d";

			reg = <0x54140000 0x00040000>;

			interrupts = <0 72 0x04>;

			clocks = <&tegra_car 21>;

		};



		gr3d {

			compatible = "nvidia,tegra30-gr3d";

			reg = <0x54180000 0x00040000>;

			clocks = <&tegra_car 24 &tegra_car 98>;

			clock-names = "3d", "3d2";

		};



		dc@54200000 {

			compatible = "nvidia,tegra30-dc";

			reg = <0x54200000 0x00040000>;

			interrupts = <0 73 0x04>;

			clocks = <&tegra_car 27>, <&tegra_car 179>;

			clock-names = "disp1", "parent";



			rgb {

				status = "disabled";
@@ -64,6 +74,8 @@ 
			compatible = "nvidia,tegra30-dc";

			reg = <0x54240000 0x00040000>;

			interrupts = <0 74 0x04>;

			clocks = <&tegra_car 26>, <&tegra_car 179>;

			clock-names = "disp2", "parent";



			rgb {

				status = "disabled";
@@ -74,6 +86,8 @@ 
			compatible = "nvidia,tegra30-hdmi";

			reg = <0x54280000 0x00040000>;

			interrupts = <0 75 0x04>;

			clocks = <&tegra_car 51>, <&tegra_car 189>;

			clock-names = "hdmi", "parent";

			status = "disabled";

		};
@@ -81,12 +95,14 @@ 
			compatible = "nvidia,tegra30-tvo";

			reg = <0x542c0000 0x00040000>;

			interrupts = <0 76 0x04>;

			clocks = <&tegra_car 169>;

			status = "disabled";

		};



		dsi {

			compatible = "nvidia,tegra30-dsi";

			reg = <0x54300000 0x00040000>;

			clocks = <&tegra_car 48>;

			status = "disabled";

		};

	};
@@ -166,6 +182,7 @@ 
			      0 141 0x04

			      0 142 0x04

			      0 143 0x04>;

		clocks = <&tegra_car 34>;

	};



	ahb: ahb {
@@ -201,6 +218,7 @@ 
		reg = <0x70006000 0x40>;

		reg-shift = <2>;

		interrupts = <0 36 0x04>;

		clocks = <&tegra_car 6>;

		status = "disabled";

	};
@@ -209,6 +227,7 @@ 
		reg = <0x70006040 0x40>;

		reg-shift = <2>;

		interrupts = <0 37 0x04>;

		clocks = <&tegra_car 160>;

		status = "disabled";

	};
@@ -217,6 +236,7 @@ 
		reg = <0x70006200 0x100>;

		reg-shift = <2>;

		interrupts = <0 46 0x04>;

		clocks = <&tegra_car 55>;

		status = "disabled";

	};
@@ -225,6 +245,7 @@ 
		reg = <0x70006300 0x100>;

		reg-shift = <2>;

		interrupts = <0 90 0x04>;

		clocks = <&tegra_car 65>;

		status = "disabled";

	};
@@ -233,6 +254,7 @@ 
		reg = <0x70006400 0x100>;

		reg-shift = <2>;

		interrupts = <0 91 0x04>;

		clocks = <&tegra_car 66>;

		status = "disabled";

	};
@@ -240,6 +262,7 @@ 
		compatible = "nvidia,tegra30-pwm", "nvidia,tegra20-pwm";

		reg = <0x7000a000 0x100>;

		#pwm-cells = <2>;

		clocks = <&tegra_car 17>;

	};



	rtc {
@@ -254,6 +277,8 @@ 
		interrupts = <0 38 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 12>, <&tegra_car 182>;

		clock-names = "div-clk", "fast-clk";

		status = "disabled";

	};
@@ -263,6 +288,8 @@ 
		interrupts = <0 84 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 54>, <&tegra_car 182>;

		clock-names = "div-clk", "fast-clk";

		status = "disabled";

	};
@@ -272,6 +299,8 @@ 
		interrupts = <0 92 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 67>, <&tegra_car 182>;

		clock-names = "div-clk", "fast-clk";

		status = "disabled";

	};
@@ -281,6 +310,8 @@ 
		interrupts = <0 120 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 103>, <&tegra_car 182>;

		clock-names = "div-clk", "fast-clk";

		status = "disabled";

	};
@@ -290,6 +321,8 @@ 
		interrupts = <0 53 0x04>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 47>, <&tegra_car 182>;

		clock-names = "div-clk", "fast-clk";

		status = "disabled";

	};
@@ -300,6 +333,7 @@ 
		nvidia,dma-request-selector = <&apbdma 15>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 41>;

		status = "disabled";

	};
@@ -310,6 +344,7 @@ 
		nvidia,dma-request-selector = <&apbdma 16>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 44>;

		status = "disabled";

	};
@@ -320,6 +355,7 @@ 
		nvidia,dma-request-selector = <&apbdma 17>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 46>;

		status = "disabled";

	};
@@ -330,6 +366,7 @@ 
		nvidia,dma-request-selector = <&apbdma 18>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 68>;

		status = "disabled";

	};
@@ -340,6 +377,7 @@ 
		nvidia,dma-request-selector = <&apbdma 27>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 104>;

		status = "disabled";

	};
@@ -350,6 +388,7 @@ 
		nvidia,dma-request-selector = <&apbdma 28>;

		#address-cells = <1>;

		#size-cells = <0>;

		clocks = <&tegra_car 105>;

		status = "disabled";

	};
@@ -383,7 +422,13 @@ 
		       0x70080200 0x100>;

		interrupts = <0 103 0x04>;

		nvidia,dma-request-selector = <&apbdma 1>;



		clocks = <&tegra_car 106>, <&tegra_car 107>, <&tegra_car 30>,

			 <&tegra_car 11>, <&tegra_car 18>, <&tegra_car 101>,

			 <&tegra_car 102>, <&tegra_car 108>, <&tegra_car 109>,

			 <&tegra_car 110>, <&tegra_car 162>;

		clock-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",

			      "i2s3", "i2s4", "dam0", "dam1", "dam2",

			      "spdif_in";

		ranges;

		#address-cells = <1>;

		#size-cells = <1>;
@@ -392,6 +437,7 @@ 
			compatible = "nvidia,tegra30-i2s";

			reg = <0x70080300 0x100>;

			nvidia,ahub-cif-ids = <4 4>;

			clocks = <&tegra_car 30>;

			status = "disabled";

		};
@@ -399,6 +445,7 @@ 
			compatible = "nvidia,tegra30-i2s";

			reg = <0x70080400 0x100>;

			nvidia,ahub-cif-ids = <5 5>;

			clocks = <&tegra_car 11>;

			status = "disabled";

		};
@@ -406,6 +453,7 @@ 
			compatible = "nvidia,tegra30-i2s";

			reg = <0x70080500 0x100>;

			nvidia,ahub-cif-ids = <6 6>;

			clocks = <&tegra_car 18>;

			status = "disabled";

		};
@@ -413,6 +461,7 @@ 
			compatible = "nvidia,tegra30-i2s";

			reg = <0x70080600 0x100>;

			nvidia,ahub-cif-ids = <7 7>;

			clocks = <&tegra_car 101>;

			status = "disabled";

		};
@@ -420,6 +469,7 @@ 
			compatible = "nvidia,tegra30-i2s";

			reg = <0x70080700 0x100>;

			nvidia,ahub-cif-ids = <8 8>;

			clocks = <&tegra_car 102>;

			status = "disabled";

		};

	};
@@ -428,6 +478,7 @@ 
		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";

		reg = <0x78000000 0x200>;

		interrupts = <0 14 0x04>;

		clocks = <&tegra_car 14>;

		status = "disabled";

	};
@@ -435,6 +486,7 @@ 
		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";

		reg = <0x78000200 0x200>;

		interrupts = <0 15 0x04>;

		clocks = <&tegra_car 9>;

		status = "disabled";

	};
@@ -442,6 +494,7 @@ 
		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";

		reg = <0x78000400 0x200>;

		interrupts = <0 19 0x04>;

		clocks = <&tegra_car 69>;

		status = "disabled";

	};
@@ -449,6 +502,7 @@ 
		compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";

		reg = <0x78000600 0x200>;

		interrupts = <0 31 0x04>;

		clocks = <&tegra_car 15>;

		status = "disabled";

	};