Loading drivers/iio/adc/qcom-rradc.c +72 −17 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #define FG_ADC_RR_FAKE_BATT_HIGH_MSB 0x5B #define FG_ADC_RR_BATT_ID_CTRL 0x60 #define FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV BIT(0) #define FG_ADC_RR_BATT_ID_TRIGGER 0x61 #define FG_ADC_RR_BATT_ID_TRIGGER_CTL BIT(0) #define FG_ADC_RR_BATT_ID_STS 0x62 Loading Loading @@ -753,36 +754,90 @@ static int rradc_read_channel_with_continuous_mode(struct rradc_chip *chip, return rc; } static int rradc_do_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data) static int rradc_enable_batt_id_channel(struct rradc_chip *chip, bool enable) { int rc = 0, bytes_to_read = 0; u8 buf[6]; u16 offset = 0, batt_id_5 = 0, batt_id_15 = 0, batt_id_150 = 0; u16 status = 0; int rc = 0; mutex_lock(&chip->lock); if (enable) { rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CTRL, FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV, FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV); if (rc < 0) { pr_err("Enabling BATT ID channel failed:%d\n", rc); return rc; } } else { rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CTRL, FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV, 0); if (rc < 0) { pr_err("Disabling BATT ID channel failed:%d\n", rc); return rc; } } return rc; } static int rradc_do_batt_id_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data, u8 *buf) { int rc = 0, ret = 0; rc = rradc_enable_batt_id_channel(chip, true); if (rc < 0) { pr_err("Enabling BATT ID channel failed:%d\n", rc); return rc; } switch (prop->channel) { case RR_ADC_BATT_ID: rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, FG_ADC_RR_BATT_ID_TRIGGER_CTL, FG_ADC_RR_BATT_ID_TRIGGER_CTL); if (rc < 0) { pr_err("BATT_ID trigger set failed:%d\n", rc); goto fail; ret = rc; rc = rradc_enable_batt_id_channel(chip, false); if (rc < 0) pr_err("Disabling BATT ID channel failed:%d\n", rc); return ret; } rc = rradc_read_channel_with_continuous_mode(chip, prop, buf); if (rc < 0) { pr_err("Error reading in continuous mode:%d\n", rc); goto fail; ret = rc; } rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, FG_ADC_RR_BATT_ID_TRIGGER_CTL, 0); if (rc < 0) { pr_err("BATT_ID trigger re-set failed:%d\n", rc); ret = rc; } rc = rradc_enable_batt_id_channel(chip, false); if (rc < 0) { pr_err("Disabling BATT ID channel failed:%d\n", rc); ret = rc; } return ret; } static int rradc_do_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data) { int rc = 0, bytes_to_read = 0; u8 buf[6]; u16 offset = 0, batt_id_5 = 0, batt_id_15 = 0, batt_id_150 = 0; u16 status = 0; mutex_lock(&chip->lock); switch (prop->channel) { case RR_ADC_BATT_ID: rc = rradc_do_batt_id_conversion(chip, prop, data, buf); if (rc < 0) { pr_err("Battery ID conversion failed:%d\n", rc); goto fail; } break; Loading Loading
drivers/iio/adc/qcom-rradc.c +72 −17 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #define FG_ADC_RR_FAKE_BATT_HIGH_MSB 0x5B #define FG_ADC_RR_BATT_ID_CTRL 0x60 #define FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV BIT(0) #define FG_ADC_RR_BATT_ID_TRIGGER 0x61 #define FG_ADC_RR_BATT_ID_TRIGGER_CTL BIT(0) #define FG_ADC_RR_BATT_ID_STS 0x62 Loading Loading @@ -753,36 +754,90 @@ static int rradc_read_channel_with_continuous_mode(struct rradc_chip *chip, return rc; } static int rradc_do_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data) static int rradc_enable_batt_id_channel(struct rradc_chip *chip, bool enable) { int rc = 0, bytes_to_read = 0; u8 buf[6]; u16 offset = 0, batt_id_5 = 0, batt_id_15 = 0, batt_id_150 = 0; u16 status = 0; int rc = 0; mutex_lock(&chip->lock); if (enable) { rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CTRL, FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV, FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV); if (rc < 0) { pr_err("Enabling BATT ID channel failed:%d\n", rc); return rc; } } else { rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_CTRL, FG_ADC_RR_BATT_ID_CTRL_CHANNEL_CONV, 0); if (rc < 0) { pr_err("Disabling BATT ID channel failed:%d\n", rc); return rc; } } return rc; } static int rradc_do_batt_id_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data, u8 *buf) { int rc = 0, ret = 0; rc = rradc_enable_batt_id_channel(chip, true); if (rc < 0) { pr_err("Enabling BATT ID channel failed:%d\n", rc); return rc; } switch (prop->channel) { case RR_ADC_BATT_ID: rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, FG_ADC_RR_BATT_ID_TRIGGER_CTL, FG_ADC_RR_BATT_ID_TRIGGER_CTL); if (rc < 0) { pr_err("BATT_ID trigger set failed:%d\n", rc); goto fail; ret = rc; rc = rradc_enable_batt_id_channel(chip, false); if (rc < 0) pr_err("Disabling BATT ID channel failed:%d\n", rc); return ret; } rc = rradc_read_channel_with_continuous_mode(chip, prop, buf); if (rc < 0) { pr_err("Error reading in continuous mode:%d\n", rc); goto fail; ret = rc; } rc = rradc_masked_write(chip, FG_ADC_RR_BATT_ID_TRIGGER, FG_ADC_RR_BATT_ID_TRIGGER_CTL, 0); if (rc < 0) { pr_err("BATT_ID trigger re-set failed:%d\n", rc); ret = rc; } rc = rradc_enable_batt_id_channel(chip, false); if (rc < 0) { pr_err("Disabling BATT ID channel failed:%d\n", rc); ret = rc; } return ret; } static int rradc_do_conversion(struct rradc_chip *chip, struct rradc_chan_prop *prop, u16 *data) { int rc = 0, bytes_to_read = 0; u8 buf[6]; u16 offset = 0, batt_id_5 = 0, batt_id_15 = 0, batt_id_150 = 0; u16 status = 0; mutex_lock(&chip->lock); switch (prop->channel) { case RR_ADC_BATT_ID: rc = rradc_do_batt_id_conversion(chip, prop, data, buf); if (rc < 0) { pr_err("Battery ID conversion failed:%d\n", rc); goto fail; } break; Loading