Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 1b83a4b4 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ASoC: sdm660_cdc: Update volatile register set for cache bypass"

parents 7407b90c 50bff156
Loading
Loading
Loading
Loading
+17 −2
Original line number Diff line number Diff line
@@ -452,8 +452,23 @@ bool msm89xx_cdc_core_readable_reg(struct device *dev, unsigned int reg)
bool msm89xx_cdc_core_volatile_reg(struct device *dev, unsigned int reg)
{
	switch (reg) {
	/* cache bypass for initial version */
	default:
	case MSM89XX_CDC_CORE_RX1_B1_CTL:
	case MSM89XX_CDC_CORE_RX2_B1_CTL:
	case MSM89XX_CDC_CORE_RX3_B1_CTL:
	case MSM89XX_CDC_CORE_RX1_B6_CTL:
	case MSM89XX_CDC_CORE_RX2_B6_CTL:
	case MSM89XX_CDC_CORE_RX3_B6_CTL:
	case MSM89XX_CDC_CORE_TX1_VOL_CTL_CFG:
	case MSM89XX_CDC_CORE_TX2_VOL_CTL_CFG:
	case MSM89XX_CDC_CORE_TX3_VOL_CTL_CFG:
	case MSM89XX_CDC_CORE_TX4_VOL_CTL_CFG:
	case MSM89XX_CDC_CORE_TX5_VOL_CTL_CFG:
	case MSM89XX_CDC_CORE_IIR1_COEF_B1_CTL:
	case MSM89XX_CDC_CORE_IIR2_COEF_B1_CTL:
	case MSM89XX_CDC_CORE_CLK_MCLK_CTL:
	case MSM89XX_CDC_CORE_CLK_PDM_CTL:
		return true;
	default:
		return false;
	}
}