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Commit 1b1e63b1 authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Gerrit - the friendly Code Review server
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drm/msm: adjust HDMI DDC speed configuration 



HDMI 2.0 compliance E-DDC test requires the DDC
signal timings to meet a minimum threshold to pass
the compliance test. Current DDC settings were not
matching the requirement.

Adjust the DDC settings to meet the threshold and
also make sure to leave the remaining bits of DDC
speed register untouched.

Change-Id: I1eb9304f219906e48f8dec988cd818b879911e71
Signed-off-by: default avatarAbhinav Kumar <abhinavk@codeaurora.org>
parent 90059640

drivers/gpu/drm/msm/hdmi-staging/sde_hdmi_util.c

+7 −2
Original line number Diff line number Diff line
@@ -874,14 +874,19 @@ void sde_hdmi_ddc_config(void *hdmi_display) 
{

	struct sde_hdmi *display = (struct sde_hdmi *)hdmi_display;

	struct hdmi *hdmi = display->ctrl.ctrl;

	uint32_t ddc_speed;



	if (!hdmi) {

		pr_err("Invalid parameters\n");

		return;

	}



	ddc_speed = hdmi_read(hdmi, REG_HDMI_DDC_SPEED);

	ddc_speed |= HDMI_DDC_SPEED_THRESHOLD(2);

	ddc_speed |= HDMI_DDC_SPEED_PRESCALE(12);



	hdmi_write(hdmi, REG_HDMI_DDC_SPEED,

			   HDMI_DDC_SPEED_THRESHOLD(2) |

			   HDMI_DDC_SPEED_PRESCALE(10));

			   ddc_speed);



	hdmi_write(hdmi, REG_HDMI_DDC_SETUP,

			   HDMI_DDC_SETUP_TIMEOUT(0xff));

drivers/gpu/drm/msm/hdmi/hdmi_util.c

+9 −3
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2017 The Linux Foundation. All rights reserved.

 * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms of the GNU General Public License version 2 as published by
@@ -19,14 +19,20 @@ 


void init_ddc(struct hdmi *hdmi)

{



	uint32_t ddc_speed;



	hdmi_write(hdmi, REG_HDMI_DDC_CTRL,

			HDMI_DDC_CTRL_SW_STATUS_RESET);

	hdmi_write(hdmi, REG_HDMI_DDC_CTRL,

			HDMI_DDC_CTRL_SOFT_RESET);



	ddc_speed = hdmi_read(hdmi, REG_HDMI_DDC_SPEED);

	ddc_speed |= HDMI_DDC_SPEED_THRESHOLD(2);

	ddc_speed |= HDMI_DDC_SPEED_PRESCALE(12);



	hdmi_write(hdmi, REG_HDMI_DDC_SPEED,

			HDMI_DDC_SPEED_THRESHOLD(2) |

			HDMI_DDC_SPEED_PRESCALE(10));

			ddc_speed);



	hdmi_write(hdmi, REG_HDMI_DDC_SETUP,

			HDMI_DDC_SETUP_TIMEOUT(0xff));