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Commit 15f13e23 authored by Vishwanath BS's avatar Vishwanath BS Committed by Kevin Hilman
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OMAP3+: OPP: Replace voltage values with Macros 



Since all voltage data is now centralized in oppxxx_data.c, we can replace
the values in the opp table with the macros used for voltage values.

This will avoid opp table and voltage layer having conflicting values.

Signed-off-by: default avatarVishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarKevin Hilman <khilman@ti.com>
parent a08572ae

arch/arm/mach-omap2/opp3xxx_data.c

+23 −23
Original line number Original line Diff line number Diff line
@@ -88,15 +88,15 @@ struct omap_volt_data omap36xx_vddcore_volt_data[] = { 




static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {

static struct omap_opp_def __initdata omap34xx_opp_def_list[] = {

	/* MPU OPP1 */

	/* MPU OPP1 */

	OPP_INITIALIZER("mpu", true, 125000000, 975000),

	OPP_INITIALIZER("mpu", true, 125000000, OMAP3430_VDD_MPU_OPP1_UV),

	/* MPU OPP2 */

	/* MPU OPP2 */

	OPP_INITIALIZER("mpu", true, 250000000, 1075000),

	OPP_INITIALIZER("mpu", true, 250000000, OMAP3430_VDD_MPU_OPP2_UV),

	/* MPU OPP3 */

	/* MPU OPP3 */

	OPP_INITIALIZER("mpu", true, 500000000, 1200000),

	OPP_INITIALIZER("mpu", true, 500000000, OMAP3430_VDD_MPU_OPP3_UV),

	/* MPU OPP4 */

	/* MPU OPP4 */

	OPP_INITIALIZER("mpu", true, 550000000, 1270000),

	OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV),

	/* MPU OPP5 */

	/* MPU OPP5 */

	OPP_INITIALIZER("mpu", true, 600000000, 1350000),

	OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV),





	/*

	/*

	 * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is

	 * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is
@@ -106,47 +106,47 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { 
	 * impact that frequency will do to the MPU and the whole system in

	 * impact that frequency will do to the MPU and the whole system in

	 * general.

	 * general.

	 */

	 */

	OPP_INITIALIZER("l3_main", false, 41500000, 975000),

	OPP_INITIALIZER("l3_main", false, 41500000, OMAP3430_VDD_CORE_OPP1_UV),

	/* L3 OPP2 */

	/* L3 OPP2 */

	OPP_INITIALIZER("l3_main", true, 83000000, 1050000),

	OPP_INITIALIZER("l3_main", true, 83000000, OMAP3430_VDD_CORE_OPP2_UV),

	/* L3 OPP3 */

	/* L3 OPP3 */

	OPP_INITIALIZER("l3_main", true, 166000000, 1150000),

	OPP_INITIALIZER("l3_main", true, 166000000, OMAP3430_VDD_CORE_OPP3_UV),





	/* DSP OPP1 */

	/* DSP OPP1 */

	OPP_INITIALIZER("iva", true, 90000000, 975000),

	OPP_INITIALIZER("iva", true, 90000000, OMAP3430_VDD_MPU_OPP1_UV),

	/* DSP OPP2 */

	/* DSP OPP2 */

	OPP_INITIALIZER("iva", true, 180000000, 1075000),

	OPP_INITIALIZER("iva", true, 180000000, OMAP3430_VDD_MPU_OPP2_UV),

	/* DSP OPP3 */

	/* DSP OPP3 */

	OPP_INITIALIZER("iva", true, 360000000, 1200000),

	OPP_INITIALIZER("iva", true, 360000000, OMAP3430_VDD_MPU_OPP3_UV),

	/* DSP OPP4 */

	/* DSP OPP4 */

	OPP_INITIALIZER("iva", true, 400000000, 1270000),

	OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV),

	/* DSP OPP5 */

	/* DSP OPP5 */

	OPP_INITIALIZER("iva", true, 430000000, 1350000),

	OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV),

};

};





static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {

static struct omap_opp_def __initdata omap36xx_opp_def_list[] = {

	/* MPU OPP1 - OPP50 */

	/* MPU OPP1 - OPP50 */

	OPP_INITIALIZER("mpu", true,  300000000, 1012500),

	OPP_INITIALIZER("mpu", true,  300000000, OMAP3630_VDD_MPU_OPP50_UV),

	/* MPU OPP2 - OPP100 */

	/* MPU OPP2 - OPP100 */

	OPP_INITIALIZER("mpu", true,  600000000, 1200000),

	OPP_INITIALIZER("mpu", true,  600000000, OMAP3630_VDD_MPU_OPP100_UV),

	/* MPU OPP3 - OPP-Turbo */

	/* MPU OPP3 - OPP-Turbo */

	OPP_INITIALIZER("mpu", false, 800000000, 1325000),

	OPP_INITIALIZER("mpu", false, 800000000, OMAP3630_VDD_MPU_OPP120_UV),

	/* MPU OPP4 - OPP-SB */

	/* MPU OPP4 - OPP-SB */

	OPP_INITIALIZER("mpu", false, 1000000000, 1375000),

	OPP_INITIALIZER("mpu", false, 1000000000, OMAP3630_VDD_MPU_OPP1G_UV),





	/* L3 OPP1 - OPP50 */

	/* L3 OPP1 - OPP50 */

	OPP_INITIALIZER("l3_main", true, 100000000, 1000000),

	OPP_INITIALIZER("l3_main", true, 100000000, OMAP3630_VDD_CORE_OPP50_UV),

	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */

	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */

	OPP_INITIALIZER("l3_main", true, 200000000, 1200000),

	OPP_INITIALIZER("l3_main", true, 200000000, OMAP3630_VDD_CORE_OPP100_UV),





	/* DSP OPP1 - OPP50 */

	/* DSP OPP1 - OPP50 */

	OPP_INITIALIZER("iva", true,  260000000, 1012500),

	OPP_INITIALIZER("iva", true,  260000000, OMAP3630_VDD_MPU_OPP50_UV),

	/* DSP OPP2 - OPP100 */

	/* DSP OPP2 - OPP100 */

	OPP_INITIALIZER("iva", true,  520000000, 1200000),

	OPP_INITIALIZER("iva", true,  520000000, OMAP3630_VDD_MPU_OPP100_UV),

	/* DSP OPP3 - OPP-Turbo */

	/* DSP OPP3 - OPP-Turbo */

	OPP_INITIALIZER("iva", false, 660000000, 1325000),

	OPP_INITIALIZER("iva", false, 660000000, OMAP3630_VDD_MPU_OPP120_UV),

	/* DSP OPP4 - OPP-SB */

	/* DSP OPP4 - OPP-SB */

	OPP_INITIALIZER("iva", false, 800000000, 1375000),

	OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV),

};

};





/**

/**

arch/arm/mach-omap2/opp4xxx_data.c

+6 −6
Original line number Original line Diff line number Diff line
@@ -66,17 +66,17 @@ struct omap_volt_data omap44xx_vdd_core_volt_data[] = { 




static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {

static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {

	/* MPU OPP1 - OPP50 */

	/* MPU OPP1 - OPP50 */

	OPP_INITIALIZER("mpu", true, 300000000, 1100000),

	OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),

	/* MPU OPP2 - OPP100 */

	/* MPU OPP2 - OPP100 */

	OPP_INITIALIZER("mpu", true, 600000000, 1200000),

	OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),

	/* MPU OPP3 - OPP-Turbo */

	/* MPU OPP3 - OPP-Turbo */

	OPP_INITIALIZER("mpu", false, 800000000, 1260000),

	OPP_INITIALIZER("mpu", false, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),

	/* MPU OPP4 - OPP-SB */

	/* MPU OPP4 - OPP-SB */

	OPP_INITIALIZER("mpu", false, 1008000000, 1350000),

	OPP_INITIALIZER("mpu", false, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),

	/* L3 OPP1 - OPP50 */

	/* L3 OPP1 - OPP50 */

	OPP_INITIALIZER("l3_main_1", true, 100000000, 930000),

	OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),

	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */

	/* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */

	OPP_INITIALIZER("l3_main_1", true, 200000000, 1100000),

	OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),

	/* TODO: add IVA, DSP, aess, fdif, gpu */

	/* TODO: add IVA, DSP, aess, fdif, gpu */

};

};