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Commit 14f6bfee authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "Merge android-4.4@610af85 (v4.4.85) into msm-4.4"

parents 043f52c2 03f50f90

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 4

SUBLEVEL = 82

SUBLEVEL = 85

EXTRAVERSION =

NAME = Blurry Fish Butt

arch/arc/include/asm/cache.h

+2 −0
Original line number Diff line number Diff line
@@ -88,7 +88,9 @@ extern int ioc_exists; 
#define ARC_REG_SLC_FLUSH	0x904

#define ARC_REG_SLC_INVALIDATE	0x905

#define ARC_REG_SLC_RGN_START	0x914

#define ARC_REG_SLC_RGN_START1	0x915

#define ARC_REG_SLC_RGN_END	0x916

#define ARC_REG_SLC_RGN_END1	0x917



/* Bit val in SLC_CONTROL */

#define SLC_CTRL_IM		0x040

arch/arc/mm/cache.c

+11 −2
Original line number Diff line number Diff line
@@ -543,6 +543,7 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op) 
	static DEFINE_SPINLOCK(lock);

	unsigned long flags;

	unsigned int ctrl;

	phys_addr_t end;



	spin_lock_irqsave(&lock, flags);
@@ -572,8 +573,16 @@ noinline void slc_op(phys_addr_t paddr, unsigned long sz, const int op) 
	 * END needs to be setup before START (latter triggers the operation)

	 * END can't be same as START, so add (l2_line_sz - 1) to sz

	 */

	write_aux_reg(ARC_REG_SLC_RGN_END, (paddr + sz + l2_line_sz - 1));

	write_aux_reg(ARC_REG_SLC_RGN_START, paddr);

	end = paddr + sz + l2_line_sz - 1;

	if (is_pae40_enabled())

		write_aux_reg(ARC_REG_SLC_RGN_END1, upper_32_bits(end));



	write_aux_reg(ARC_REG_SLC_RGN_END, lower_32_bits(end));



	if (is_pae40_enabled())

		write_aux_reg(ARC_REG_SLC_RGN_START1, upper_32_bits(paddr));



	write_aux_reg(ARC_REG_SLC_RGN_START, lower_32_bits(paddr));



	while (read_aux_reg(ARC_REG_SLC_CTRL) & SLC_CTRL_BUSY);

arch/arm64/include/asm/current.h

+9 −1
Original line number Diff line number Diff line
@@ -10,9 +10,17 @@ 
#ifdef CONFIG_THREAD_INFO_IN_TASK

struct task_struct;



/*

 * We don't use read_sysreg() as we want the compiler to cache the value where

 * possible.

 */

static __always_inline struct task_struct *get_current(void)

{

	return (struct task_struct *)read_sysreg(sp_el0);

	unsigned long sp_el0;



	asm ("mrs %0, sp_el0" : "=r" (sp_el0));



	return (struct task_struct *)sp_el0;

}

#define current get_current()

#else

arch/arm64/include/asm/elf.h

+2 −2
Original line number Diff line number Diff line
@@ -115,10 +115,10 @@ 


/*

 * This is the base location for PIE (ET_DYN with INTERP) loads. On

 * 64-bit, this is raised to 4GB to leave the entire 32-bit address

 * 64-bit, this is above 4GB to leave the entire 32-bit address

 * space open for things that want to use the area for 32-bit pointers.

 */

#define ELF_ET_DYN_BASE		0x100000000UL

#define ELF_ET_DYN_BASE		(2 * TASK_SIZE_64 / 3)



#ifndef __ASSEMBLY__