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Commit 14e73214 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm: gpu: Return error on hw_init failure"

parents 09191dbe efa51be2

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+12 −9
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ extern bool hang_debug; 


static void a3xx_dump(struct msm_gpu *gpu);



static void a3xx_me_init(struct msm_gpu *gpu)

static bool a3xx_me_init(struct msm_gpu *gpu)

{

	struct msm_ringbuffer *ring = gpu->rb;
@@ -65,7 +65,7 @@ static void a3xx_me_init(struct msm_gpu *gpu) 
	OUT_RING(ring, 0x00000000);



	gpu->funcs->flush(gpu);

	gpu->funcs->idle(gpu);

	return gpu->funcs->idle(gpu);

}



static int a3xx_hw_init(struct msm_gpu *gpu)
@@ -294,9 +294,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu) 
	/* clear ME_HALT to start micro engine */

	gpu_write(gpu, REG_AXXX_CP_ME_CNTL, 0);



	a3xx_me_init(gpu);



	return 0;

	return a3xx_me_init(gpu) ? 0 : -EINVAL;

}



static void a3xx_recover(struct msm_gpu *gpu)
@@ -330,17 +328,22 @@ static void a3xx_destroy(struct msm_gpu *gpu) 
	kfree(a3xx_gpu);

}



static void a3xx_idle(struct msm_gpu *gpu)

static bool a3xx_idle(struct msm_gpu *gpu)

{

	/* wait for ringbuffer to drain: */

	adreno_idle(gpu);

	if (!adreno_idle(gpu))

		return false;



	/* then wait for GPU to finish: */

	if (spin_until(!(gpu_read(gpu, REG_A3XX_RBBM_STATUS) &

			A3XX_RBBM_STATUS_GPU_BUSY)))

			A3XX_RBBM_STATUS_GPU_BUSY))) {

		DRM_ERROR("%s: timeout waiting for GPU to idle!\n", gpu->name);



		/* TODO maybe we need to reset GPU here to recover from hang? */

		return false;

	}



	return true;

}



static irqreturn_t a3xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+11 −9
Original line number Diff line number Diff line
@@ -113,7 +113,7 @@ static void a4xx_enable_hwcg(struct msm_gpu *gpu) 
}





static void a4xx_me_init(struct msm_gpu *gpu)

static bool a4xx_me_init(struct msm_gpu *gpu)

{

	struct msm_ringbuffer *ring = gpu->rb;
@@ -137,7 +137,7 @@ static void a4xx_me_init(struct msm_gpu *gpu) 
	OUT_RING(ring, 0x00000000);



	gpu->funcs->flush(gpu);

	gpu->funcs->idle(gpu);

	return gpu->funcs->idle(gpu);

}



static int a4xx_hw_init(struct msm_gpu *gpu)
@@ -292,9 +292,7 @@ static int a4xx_hw_init(struct msm_gpu *gpu) 
	/* clear ME_HALT to start micro engine */

	gpu_write(gpu, REG_A4XX_CP_ME_CNTL, 0);



	a4xx_me_init(gpu);



	return 0;

	return a4xx_me_init(gpu) ? 0 : -EINVAL;

}



static void a4xx_recover(struct msm_gpu *gpu)
@@ -328,17 +326,21 @@ static void a4xx_destroy(struct msm_gpu *gpu) 
	kfree(a4xx_gpu);

}



static void a4xx_idle(struct msm_gpu *gpu)

static bool a4xx_idle(struct msm_gpu *gpu)

{

	/* wait for ringbuffer to drain: */

	adreno_idle(gpu);

	if (!adreno_idle(gpu))

		return false;



	/* then wait for GPU to finish: */

	if (spin_until(!(gpu_read(gpu, REG_A4XX_RBBM_STATUS) &

					A4XX_RBBM_STATUS_GPU_BUSY)))

					A4XX_RBBM_STATUS_GPU_BUSY))) {

		DRM_ERROR("%s: timeout waiting for GPU to idle!\n", gpu->name);



		/* TODO maybe we need to reset GPU here to recover from hang? */

		return false;

	}



	return true;

}



static irqreturn_t a4xx_irq(struct msm_gpu *gpu)

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+5 −6
Original line number Diff line number Diff line
@@ -227,19 +227,18 @@ void adreno_flush(struct msm_gpu *gpu) 
	adreno_gpu_write(adreno_gpu, REG_ADRENO_CP_RB_WPTR, wptr);

}



void adreno_idle(struct msm_gpu *gpu)

bool adreno_idle(struct msm_gpu *gpu)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	uint32_t wptr = get_wptr(gpu->rb);

	int ret;



	/* wait for CP to drain ringbuffer: */

	ret = spin_until(get_rptr(adreno_gpu) == wptr);



	if (ret)

		DRM_ERROR("%s: timeout waiting to drain ringbuffer!\n", gpu->name);

	if (!spin_until(get_rptr(adreno_gpu) == wptr))

		return true;



	/* TODO maybe we need to reset GPU here to recover from hang? */

	DRM_ERROR("%s: timeout waiting to drain ringbuffer!\n", gpu->name);

	return false;

}



#ifdef CONFIG_DEBUG_FS

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+1 −1
Original line number Diff line number Diff line
@@ -241,7 +241,7 @@ void adreno_recover(struct msm_gpu *gpu); 
int adreno_submit(struct msm_gpu *gpu, struct msm_gem_submit *submit,

		struct msm_file_private *ctx);

void adreno_flush(struct msm_gpu *gpu);

void adreno_idle(struct msm_gpu *gpu);

bool adreno_idle(struct msm_gpu *gpu);

#ifdef CONFIG_DEBUG_FS

void adreno_show(struct msm_gpu *gpu, struct seq_file *m);

#endif

drivers/gpu/drm/msm/msm_gpu.h

+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ struct msm_gpu_funcs { 
	int (*submit)(struct msm_gpu *gpu, struct msm_gem_submit *submit,

			struct msm_file_private *ctx);

	void (*flush)(struct msm_gpu *gpu);

	void (*idle)(struct msm_gpu *gpu);

	bool (*idle)(struct msm_gpu *gpu);

	irqreturn_t (*irq)(struct msm_gpu *irq);

	uint32_t (*last_fence)(struct msm_gpu *gpu);

	void (*recover)(struct msm_gpu *gpu);