Loading arch/arm64/include/asm/efi.h +1 −3 Original line number Diff line number Diff line Loading @@ -87,10 +87,8 @@ static inline void efi_set_pgd(struct mm_struct *mm) * Defer the switch to the current thread's TTBR0_EL1 * until uaccess_enable(). Restore the current * thread's saved ttbr0 corresponding to its active_mm * (if different from init_mm). */ cpu_set_reserved_ttbr0(); if (current->active_mm != &init_mm) update_saved_ttbr0(current, current->active_mm); } } Loading arch/arm64/include/asm/mmu_context.h +23 −23 Original line number Diff line number Diff line Loading @@ -165,29 +165,21 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu); #define init_new_context(tsk,mm) ({ atomic64_set(&(mm)->context.id, 0); 0; }) /* * This is called when "tsk" is about to enter lazy TLB mode. * * mm: describes the currently active mm context * tsk: task which is entering lazy tlb * cpu: cpu number which is entering lazy tlb * * tsk->mm will be NULL */ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } #ifdef CONFIG_ARM64_SW_TTBR0_PAN static inline void update_saved_ttbr0(struct task_struct *tsk, struct mm_struct *mm) { if (system_uses_ttbr0_pan()) { BUG_ON(mm->pgd == swapper_pg_dir); task_thread_info(tsk)->ttbr0 = virt_to_phys(mm->pgd) | ASID(mm) << 48; } u64 ttbr; if (!system_uses_ttbr0_pan()) return; if (mm == &init_mm) ttbr = __pa_symbol(empty_zero_page); else ttbr = virt_to_phys(mm->pgd) | ASID(mm) << 48; task_thread_info(tsk)->ttbr0 = ttbr; } #else static inline void update_saved_ttbr0(struct task_struct *tsk, Loading @@ -196,6 +188,16 @@ static inline void update_saved_ttbr0(struct task_struct *tsk, } #endif static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { /* * We don't actually care about the ttbr0 mapping, so point it at the * zero page. */ update_saved_ttbr0(tsk, &init_mm); } static inline void __switch_mm(struct mm_struct *next) { unsigned int cpu = smp_processor_id(); Loading Loading @@ -223,10 +225,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, * Update the saved TTBR0_EL1 of the scheduled-in task as the previous * value may have not been initialised yet (activate_mm caller) or the * ASID has changed since the last run (following the context switch * of another thread of the same process). Avoid setting the reserved * TTBR0_EL1 to swapper_pg_dir (init_mm; e.g. via idle_task_exit). * of another thread of the same process). */ if (next != &init_mm) update_saved_ttbr0(tsk, next); } Loading Loading
arch/arm64/include/asm/efi.h +1 −3 Original line number Diff line number Diff line Loading @@ -87,10 +87,8 @@ static inline void efi_set_pgd(struct mm_struct *mm) * Defer the switch to the current thread's TTBR0_EL1 * until uaccess_enable(). Restore the current * thread's saved ttbr0 corresponding to its active_mm * (if different from init_mm). */ cpu_set_reserved_ttbr0(); if (current->active_mm != &init_mm) update_saved_ttbr0(current, current->active_mm); } } Loading
arch/arm64/include/asm/mmu_context.h +23 −23 Original line number Diff line number Diff line Loading @@ -165,29 +165,21 @@ void check_and_switch_context(struct mm_struct *mm, unsigned int cpu); #define init_new_context(tsk,mm) ({ atomic64_set(&(mm)->context.id, 0); 0; }) /* * This is called when "tsk" is about to enter lazy TLB mode. * * mm: describes the currently active mm context * tsk: task which is entering lazy tlb * cpu: cpu number which is entering lazy tlb * * tsk->mm will be NULL */ static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { } #ifdef CONFIG_ARM64_SW_TTBR0_PAN static inline void update_saved_ttbr0(struct task_struct *tsk, struct mm_struct *mm) { if (system_uses_ttbr0_pan()) { BUG_ON(mm->pgd == swapper_pg_dir); task_thread_info(tsk)->ttbr0 = virt_to_phys(mm->pgd) | ASID(mm) << 48; } u64 ttbr; if (!system_uses_ttbr0_pan()) return; if (mm == &init_mm) ttbr = __pa_symbol(empty_zero_page); else ttbr = virt_to_phys(mm->pgd) | ASID(mm) << 48; task_thread_info(tsk)->ttbr0 = ttbr; } #else static inline void update_saved_ttbr0(struct task_struct *tsk, Loading @@ -196,6 +188,16 @@ static inline void update_saved_ttbr0(struct task_struct *tsk, } #endif static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) { /* * We don't actually care about the ttbr0 mapping, so point it at the * zero page. */ update_saved_ttbr0(tsk, &init_mm); } static inline void __switch_mm(struct mm_struct *next) { unsigned int cpu = smp_processor_id(); Loading Loading @@ -223,10 +225,8 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next, * Update the saved TTBR0_EL1 of the scheduled-in task as the previous * value may have not been initialised yet (activate_mm caller) or the * ASID has changed since the last run (following the context switch * of another thread of the same process). Avoid setting the reserved * TTBR0_EL1 to swapper_pg_dir (init_mm; e.g. via idle_task_exit). * of another thread of the same process). */ if (next != &init_mm) update_saved_ttbr0(tsk, next); } Loading