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Commit 0f8e3d36 authored Dec 22, 2006 by Michael Riepe Committed by Linus Torvalds Dec 22, 2006

[PATCH] KVM: Handle p5 mce msrs



This allows plan9 to get a little further booting.

Signed-off-by: Michael Riepe <michael@mr511.de>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

parent abacf8df

drivers/kvm/svm.c

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1073,6 +1073,8 @@ static int emulate_on_interception(struct kvm_vcpu vcpu, struct kvm_run kvm_ru
	static int svm_get_msr(struct kvm_vcpu vcpu, unsigned ecx, u64 data)		static int svm_get_msr(struct kvm_vcpu vcpu, unsigned ecx, u64 data)
	{		{
	switch (ecx) {		switch (ecx) {
			case MSR_IA32_P5_MC_ADDR:
			case MSR_IA32_P5_MC_TYPE:
	case MSR_IA32_MC0_CTL:		case MSR_IA32_MC0_CTL:
	case MSR_IA32_MCG_STATUS:		case MSR_IA32_MCG_STATUS:
	case MSR_IA32_MCG_CAP:		case MSR_IA32_MCG_CAP:

drivers/kvm/vmx.c

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -359,6 +359,8 @@ static int vmx_get_msr(struct kvm_vcpu vcpu, u32 msr_index, u64 pdata)
	case MSR_IA32_SYSENTER_ESP:		case MSR_IA32_SYSENTER_ESP:
	data = vmcs_read32(GUEST_SYSENTER_ESP);		data = vmcs_read32(GUEST_SYSENTER_ESP);
	break;		break;
			case MSR_IA32_P5_MC_ADDR:
			case MSR_IA32_P5_MC_TYPE:
	case MSR_IA32_MC0_CTL:		case MSR_IA32_MC0_CTL:
	case MSR_IA32_MCG_STATUS:		case MSR_IA32_MCG_STATUS:
	case MSR_IA32_MCG_CAP:		case MSR_IA32_MCG_CAP: