Loading drivers/gpu/drm/msm/sde/sde_kms.c +15 −0 Original line number Diff line number Diff line Loading @@ -1128,6 +1128,7 @@ static int _sde_kms_mmu_init(struct sde_kms *sde_kms) { struct msm_mmu *mmu; int i, ret; int data = 0; for (i = 0; i < MSM_SMMU_DOMAIN_MAX; i++) { struct msm_gem_address_space *aspace; Loading Loading @@ -1188,6 +1189,20 @@ static int _sde_kms_mmu_init(struct sde_kms *sde_kms) msm_gem_address_space_put(aspace); goto fail; } /* * Enable stage 1 smmu after user has finished early * mapping of splash memory. */ ret = mmu->funcs->set_property(mmu, DOMAIN_ATTR_EARLY_MAP, &data); if (ret) { SDE_ERROR("failed to set map att(%d): %d\n", data, ret); msm_gem_address_space_put(aspace); goto fail; } } } Loading drivers/gpu/drm/msm/sde/sde_splash.c +1 −26 Original line number Diff line number Diff line Loading @@ -856,16 +856,12 @@ int sde_splash_free_resource(struct msm_kms *kms, } /* * In below function, it will * 1. Notify LK to stop display splash. * 2. Set DOMAIN_ATTR_EARLY_MAP to 1 to enable stage 1 translation in iommu. * Below function will notify LK to stop display splash. */ int sde_splash_lk_stop_splash(struct msm_kms *kms) { struct sde_splash_info *sinfo; struct msm_mmu *mmu; struct sde_kms *sde_kms = to_sde_kms(kms); int ret; sinfo = &sde_kms->splash_info; Loading @@ -884,26 +880,5 @@ int sde_splash_lk_stop_splash(struct msm_kms *kms) } mutex_unlock(&sde_splash_lock); if (!sde_kms->aspace[0] || !sde_kms->aspace[0]->mmu) { /* We do not return fault value here, to ensure * flag "lk_is_exited" is set. */ SDE_ERROR("invalid mmu\n"); WARN_ON(1); } else { mmu = sde_kms->aspace[0]->mmu; /* After LK has exited, set early domain map attribute * to 1 to enable stage 1 translation in iommu driver. */ if (mmu->funcs && mmu->funcs->set_property) { ret = mmu->funcs->set_property(mmu, DOMAIN_ATTR_EARLY_MAP, &sinfo->display_splash_enabled); if (ret) SDE_ERROR("set_property failed\n"); } } return 0; } Loading
drivers/gpu/drm/msm/sde/sde_kms.c +15 −0 Original line number Diff line number Diff line Loading @@ -1128,6 +1128,7 @@ static int _sde_kms_mmu_init(struct sde_kms *sde_kms) { struct msm_mmu *mmu; int i, ret; int data = 0; for (i = 0; i < MSM_SMMU_DOMAIN_MAX; i++) { struct msm_gem_address_space *aspace; Loading Loading @@ -1188,6 +1189,20 @@ static int _sde_kms_mmu_init(struct sde_kms *sde_kms) msm_gem_address_space_put(aspace); goto fail; } /* * Enable stage 1 smmu after user has finished early * mapping of splash memory. */ ret = mmu->funcs->set_property(mmu, DOMAIN_ATTR_EARLY_MAP, &data); if (ret) { SDE_ERROR("failed to set map att(%d): %d\n", data, ret); msm_gem_address_space_put(aspace); goto fail; } } } Loading
drivers/gpu/drm/msm/sde/sde_splash.c +1 −26 Original line number Diff line number Diff line Loading @@ -856,16 +856,12 @@ int sde_splash_free_resource(struct msm_kms *kms, } /* * In below function, it will * 1. Notify LK to stop display splash. * 2. Set DOMAIN_ATTR_EARLY_MAP to 1 to enable stage 1 translation in iommu. * Below function will notify LK to stop display splash. */ int sde_splash_lk_stop_splash(struct msm_kms *kms) { struct sde_splash_info *sinfo; struct msm_mmu *mmu; struct sde_kms *sde_kms = to_sde_kms(kms); int ret; sinfo = &sde_kms->splash_info; Loading @@ -884,26 +880,5 @@ int sde_splash_lk_stop_splash(struct msm_kms *kms) } mutex_unlock(&sde_splash_lock); if (!sde_kms->aspace[0] || !sde_kms->aspace[0]->mmu) { /* We do not return fault value here, to ensure * flag "lk_is_exited" is set. */ SDE_ERROR("invalid mmu\n"); WARN_ON(1); } else { mmu = sde_kms->aspace[0]->mmu; /* After LK has exited, set early domain map attribute * to 1 to enable stage 1 translation in iommu driver. */ if (mmu->funcs && mmu->funcs->set_property) { ret = mmu->funcs->set_property(mmu, DOMAIN_ATTR_EARLY_MAP, &sinfo->display_splash_enabled); if (ret) SDE_ERROR("set_property failed\n"); } } return 0; }