Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0a354775 authored by Simon Arlott's avatar Simon Arlott Committed by Paul Mundt
Browse files

spelling fixes: arch/sh64/ 



Spelling fixes in arch/sh64/.

Signed-off-by: default avatarSimon Arlott <simon@fire.lp0.eu>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 47e77eee

arch/sh64/kernel/pci_sh5.h

+1 −1
Original line number Diff line number Diff line
@@ -4,7 +4,7 @@ 
 * May be copied or modified under the terms of the GNU General Public

 * License.  See linux/COPYING for more information.

 *

 * Defintions for the SH5 PCI hardware.

 * Definitions for the SH5 PCI hardware.

 */



/* Product ID */

arch/sh64/kernel/process.c

+1 −1
Original line number Diff line number Diff line
@@ -387,7 +387,7 @@ ATTRIB_NORET void kernel_thread_helper(void *arg, int (*fn)(void *)) 
 * NOTE! Only a kernel-only process(ie the swapper or direct descendants

 * who haven't done an "execve()") should use this: it will work within

 * a system call from a "real" process, but the process memory space will

 * not be free'd until both the parent and the child have exited.

 * not be freed until both the parent and the child have exited.

 */

int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)

{

arch/sh64/kernel/time.c

+1 −1
Original line number Diff line number Diff line
@@ -123,7 +123,7 @@ static unsigned long long usecs_per_jiffy = 1000000/HZ; /* Approximation */ 
static unsigned long long scaled_recip_ctc_ticks_per_jiffy;



/* Estimate number of microseconds that have elapsed since the last timer tick,

   by scaling the delta that has occured in the CTC register.

   by scaling the delta that has occurred in the CTC register.



   WARNING WARNING WARNING : This algorithm relies on the CTC decrementing at

   the CPU clock rate.  If the CPU sleeps, the CTC stops counting.  Bear this

arch/sh64/mach-cayman/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -213,7 +213,7 @@ static int __init smsc_superio_setup(void) 
	SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */

#endif



	/* Exit the configuraton state */

	/* Exit the configuration state */

	outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);



	return 0;

arch/sh64/mm/fault.c

+1 −1
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess, 
	/* SIM

	 * Note this is now called with interrupts still disabled

	 * This is to cope with being called for a missing IO port

	 * address with interupts disabled. This should be fixed as

	 * address with interrupts disabled. This should be fixed as

	 * soon as we have a better 'fast path' miss handler.

	 *

	 * Plus take care how you try and debug this stuff.