Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 08d69a25 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq updates from Thomas Gleixner:
 "Nothing spectacular from the irq department this time:
   - overhaul of the crossbar chip driver
   - overhaul of the spear shirq chip driver
   - support for the atmel-aic chip
   - code move from arch to drivers
   - the usual tiny fixlets
   - two reverts worth to mention which undo the too simple attempt of
     supporting wakeup interrupts on shared interrupt lines"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (41 commits)
  Revert "irq: Warn when shared interrupts do not match on NO_SUSPEND"
  Revert "PM / sleep / irq: Do not suspend wakeup interrupts"
  irq: Warn when shared interrupts do not match on NO_SUSPEND
  irqchip: atmel-aic: Define irq fixups for atmel SoCs
  irqchip: atmel-aic: Implement RTC irq fixup
  irqchip: atmel-aic: Add irq fixup infrastructure
  irqchip: atmel-aic: Add atmel AIC/AIC5 drivers
  irqchip: atmel-aic: Move binding doc to interrupt-controller directory
  genirq: generic chip: Export irq_map_generic_chip function
  PM / sleep / irq: Do not suspend wakeup interrupts
  irqchip: or1k-pic: Migrate from arch/openrisc/
  irqchip: crossbar: Allow for quirky hardware with direct hardwiring of GIC
  documentation: dt: omap: crossbar: Add description for interrupt consumer
  irqchip: crossbar: Introduce centralized check for crossbar write
  irqchip: crossbar: Introduce ti, max-crossbar-sources to identify valid crossbar mapping
  irqchip: crossbar: Add kerneldoc for crossbar_domain_unmap callback
  irqchip: crossbar: Set cb pointer to null in case of error
  irqchip: crossbar: Change the goto naming
  irqchip: crossbar: Return proper error value
  irqchip: crossbar: Fix kerneldoc warning
  ...
parents ed5c41d3 c6f12245
Loading
Loading
Loading
Loading
+36 −0
Original line number Original line Diff line number Diff line
@@ -10,6 +10,7 @@ Required properties:
- compatible : Should be "ti,irq-crossbar"
- compatible : Should be "ti,irq-crossbar"
- reg: Base address and the size of the crossbar registers.
- reg: Base address and the size of the crossbar registers.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
- ti,max-irqs: Total number of irqs available at the interrupt controller.
- ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
- ti,reg-size: Size of a individual register in bytes. Every individual
- ti,reg-size: Size of a individual register in bytes. Every individual
	    register is assumed to be of same size. Valid sizes are 1, 2, 4.
	    register is assumed to be of same size. Valid sizes are 1, 2, 4.
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
- ti,irqs-reserved: List of the reserved irq lines that are not muxed using
@@ -17,11 +18,46 @@ Required properties:
		 so crossbar bar driver should not consider them as free
		 so crossbar bar driver should not consider them as free
		 lines.
		 lines.


Optional properties:
- ti,irqs-skip: This is similar to "ti,irqs-reserved", but these are for
  SOC-specific hard-wiring of those irqs which unexpectedly bypasses the
  crossbar. These irqs have a crossbar register, but still cannot be used.

- ti,irqs-safe-map: integer which maps to a safe configuration to use
  when the interrupt controller irq is unused (when not provided, default is 0)

Examples:
Examples:
		crossbar_mpu: @4a020000 {
		crossbar_mpu: @4a020000 {
			compatible = "ti,irq-crossbar";
			compatible = "ti,irq-crossbar";
			reg = <0x4a002a48 0x130>;
			reg = <0x4a002a48 0x130>;
			ti,max-irqs = <160>;
			ti,max-irqs = <160>;
			ti,max-crossbar-sources = <400>;
			ti,reg-size = <2>;
			ti,reg-size = <2>;
			ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>;
			ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>;
			ti,irqs-skip = <10 133 139 140>;
		};

Consumer:
========
See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and
Documentation/devicetree/bindings/arm/gic.txt for further details.

An interrupt consumer on an SoC using crossbar will use:
	interrupts = <GIC_SPI request_number interrupt_level>
When the request number is between 0 to that described by
"ti,max-crossbar-sources", it is assumed to be a crossbar mapping. If the
request_number is greater than "ti,max-crossbar-sources", then it is mapped as a
quirky hardware mapping direct to GIC.

Example:
	device_x@0x4a023000 {
		/* Crossbar 8 used */
		interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
		...
	};

	device_y@0x4a033000 {
		/* Direct mapped GIC SPI 1 used */
		interrupts = <GIC_SPI DIRECT_IRQ(1) IRQ_TYPE_LEVEL_HIGH>;
		...
	};
	};
+23 −0
Original line number Original line Diff line number Diff line
OpenRISC 1000 Programmable Interrupt Controller

Required properties:

- compatible : should be "opencores,or1k-pic-level" for variants with
  level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with
  edge triggered interrupt lines or "opencores,or1200-pic" for machines
  with the non-spec compliant or1200 type implementation.

  "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic",
  but this is only for backwards compatibility.

- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
  interrupt source. The value shall be 1.

Example:

intc: interrupt-controller {
	compatible = "opencores,or1k-pic-level";
	interrupt-controller;
	#interrupt-cells = <1>;
};
+1 −0
Original line number Original line Diff line number Diff line
@@ -22,6 +22,7 @@ config OPENRISC
	select GENERIC_STRNLEN_USER
	select GENERIC_STRNLEN_USER
	select MODULES_USE_ELF_RELA
	select MODULES_USE_ELF_RELA
	select HAVE_DEBUG_STACKOVERFLOW
	select HAVE_DEBUG_STACKOVERFLOW
	select OR1K_PIC


config MMU
config MMU
	def_bool y
	def_bool y
+3 −0
Original line number Original line Diff line number Diff line
@@ -24,4 +24,7 @@


#define NO_IRQ		(-1)
#define NO_IRQ		(-1)


void handle_IRQ(unsigned int, struct pt_regs *);
extern void set_handle_irq(void (*handle_irq)(struct pt_regs *));

#endif /* __ASM_OPENRISC_IRQ_H__ */
#endif /* __ASM_OPENRISC_IRQ_H__ */
Loading