drivers: staging: Update qcacld-3.0 to LA.UM.6.4.r1-07600-8x98.0 (068f5f12) · Commits · e / devices / android_kernel_sony_msm8998

drivers/staging/fw-api/fw/a_usb_defs.h

+17 −13

drivers/staging/fw-api/fw/athdefs.h

+42 −35

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* Copyright (c) 2012, 2014 The Linux Foundation. All rights reserved.		* Copyright (c) 2012 The Linux Foundation. All rights reserved.
	*		*
	* Previously licensed under the ISC license by Qualcomm Atheros, Inc.		* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
	*		*
	@@ -74,10 +74,17 @@ typedef enum {
	A_PHY_ERROR, /* RX PHY error */		A_PHY_ERROR, /* RX PHY error */
	A_CONSUMED, /* Object was consumed */		A_CONSUMED, /* Object was consumed */
	A_CLONE, /* The buffer is cloned */		A_CLONE, /* The buffer is cloned */
	A_USB_ERROR, /* Rome USB Target error */
	} A_STATUS;		} A_STATUS;

	#define A_SUCCESS(x) (x == A_OK)		#define A_SUCCESS(x) (x == A_OK)
	#define A_FAILED(x) (!A_SUCCESS(x))		#define A_FAILED(x) (!A_SUCCESS(x))

			#ifndef TRUE
			#define TRUE 1
			#endif

			#ifndef FALSE
			#define FALSE 0
			#endif

	#endif /* __ATHDEFS_H__ */		#endif /* __ATHDEFS_H__ */

drivers/staging/fw-api/fw/bin_sig.h

+9 −10

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* Copyright (c) 2012,2014, 2016 The Linux Foundation. All rights reserved.		* Copyright (c) 2012 The Linux Foundation. All rights reserved.
	*		*
	* Previously licensed under the ISC license by Qualcomm Atheros, Inc.		* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
	*		*
	@@ -28,7 +28,6 @@
	#ifndef BIN_SIGN_H_		#ifndef BIN_SIGN_H_
	#define BIN_SIGN_H_		#define BIN_SIGN_H_


	/* Signed binary MetaData */		/* Signed binary MetaData */
	typedef struct {		typedef struct {
	unsigned int magic_num;		unsigned int magic_num;

drivers/staging/fw-api/fw/bmi_msg.h

+180 −183

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* Copyright (c) 2012-2014, 2016-2017 The Linux Foundation. All rights reserved.		* Copyright (c) 2012, 2018 The Linux Foundation. All rights reserved.
	*		*
	* Previously licensed under the ISC license by Qualcomm Atheros, Inc.		* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
	*		*
	@@ -59,6 +59,7 @@
	* BMI handles all required Target-side cache flushing.		* BMI handles all required Target-side cache flushing.
	*/		*/


	/* Maximum data size used for BMI transfers */		/* Maximum data size used for BMI transfers */
	#define BMI_DATASZ_MAX 256		#define BMI_DATASZ_MAX 256

	@@ -232,13 +233,12 @@ struct bmi_segmented_metadata {
	* Response format3 (newest firmware)		* Response format3 (newest firmware)
	* struct bmi_target_info;		* struct bmi_target_info;
	*/		*/

	PREPACK struct bmi_target_info {		PREPACK struct bmi_target_info {
	/* size of this structure */		A_UINT32 target_info_byte_count; /* size of this structure */
	A_UINT32 target_info_byte_count;		A_UINT32 target_ver; /* Target Version ID */
	A_UINT32 target_ver;		A_UINT32 target_type; /* Target type */
	A_UINT32 target_type;
	} POSTPACK;		} POSTPACK;

	#define TARGET_VERSION_SENTINAL 0xffffffff		#define TARGET_VERSION_SENTINAL 0xffffffff
	#define TARGET_TYPE_UNKNOWN 0		#define TARGET_TYPE_UNKNOWN 0
	#define TARGET_TYPE_AR6001 1		#define TARGET_TYPE_AR6001 1
	@@ -259,14 +259,9 @@ PREPACK struct bmi_target_info {
	#define TARGET_TYPE_AR6320V3 13		#define TARGET_TYPE_AR6320V3 13
	/* For Tufello1.0 target_reg_tbl ID*/		/* For Tufello1.0 target_reg_tbl ID*/
	#define TARGET_TYPE_QCA9377V1 14		#define TARGET_TYPE_QCA9377V1 14
	/* cascade */		#define TARGET_TYPE_QCA9984 15 /* cascade */
	#define TARGET_TYPE_QCA9984 15		#define TARGET_TYPE_IPQ4019 16 /* dakota */
	/* dakota */		#define TARGET_TYPE_QCA9888 17 /* besra */
	#define TARGET_TYPE_IPQ4019 16
	/* besra */
	#define TARGET_TYPE_QCA9888 17
	/* For Adrastea target */
	#define TARGET_TYPE_ADRASTEA 19

	#define BMI_ROMPATCH_INSTALL 9		#define BMI_ROMPATCH_INSTALL 9
	/*		/*
	@@ -315,6 +310,7 @@ PREPACK struct bmi_target_info {
	* Response format: none		* Response format: none
	*/		*/


	#define BMI_LZ_STREAM_START 13		#define BMI_LZ_STREAM_START 13
	/*		/*
	* Semantics: Begin an LZ-compressed stream of input		* Semantics: Begin an LZ-compressed stream of input
	@@ -372,6 +368,7 @@ PREPACK struct bmi_target_info {
	* Response format: none		* Response format: none
	*/		*/


	#ifndef ATH_TARGET		#ifndef ATH_TARGET
	#include "athendpack.h"		#include "athendpack.h"
	#endif		#endif

drivers/staging/fw-api/fw/cepci.h

+30 −27

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* Copyright (c) 2013-2014, 2016 The Linux Foundation. All rights reserved.		* Copyright (c) 2012-2016 The Linux Foundation. All rights reserved.
	*		*
	* Previously licensed under the ISC license by Qualcomm Atheros, Inc.		* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
	*		*
	@@ -32,6 +32,7 @@
	* Support for Copy Engine over PCI.		* Support for Copy Engine over PCI.
	* Structures shared between Host software and Target firmware.		* Structures shared between Host software and Target firmware.
	*/		*/
			#include <a_types.h> /* A_UINT32 */

	/*		/*
	* Total number of PCIe MSI interrupts requested for all interrupt sources.		* Total number of PCIe MSI interrupts requested for all interrupt sources.
	@@ -54,6 +55,9 @@
	#define MSI_ASSIGN_CE_INITIAL 1 /* 7 MSIs for Copy Engines */		#define MSI_ASSIGN_CE_INITIAL 1 /* 7 MSIs for Copy Engines */
	#define MSI_ASSIGN_CE_MAX 7		#define MSI_ASSIGN_CE_MAX 7




	/*		/*
	* PCI-specific Target state. Much of this may be of interest		* PCI-specific Target state. Much of this may be of interest
	* to the Host so HOST_INTEREST->hi_interconnect_state points		* to the Host so HOST_INTEREST->hi_interconnect_state points
	@@ -62,32 +66,31 @@
	* required to initialize pipe_cfg_addr and svc_to_pipe_map.		* required to initialize pipe_cfg_addr and svc_to_pipe_map.
	*/		*/
	struct pcie_state_s {		struct pcie_state_s {
	uint32_t pipe_cfg_addr; /* Pipe configuration Target address */		A_UINT32 pipe_cfg_addr; /* Pipe configuration Target address */
	/* NB: CE_pipe_config[CE_COUNT] */		/* NB: CE_pipe_config[CE_COUNT] */

	uint32_t svc_to_pipe_map; /* Service to pipe map Target address */		A_UINT32 svc_to_pipe_map; /* Service to pipe map Target address */
	/* NB: service_to_pipe[PIPE_TO_CE_MAP_CN] */		/* NB: service_to_pipe[PIPE_TO_CE_MAP_CN] */

	uint32_t MSI_requested; /* number of MSI interrupts requested */		A_UINT32 MSI_requested; /* number of MSI interrupts requested */
	uint32_t MSI_granted; /* number of MSI interrupts granted */		A_UINT32 MSI_granted; /* number of MSI interrupts granted */
	uint32_t MSI_addr; /* Message Signalled Interrupt address */		A_UINT32 MSI_addr; /* Message Signalled Interrupt address */
	uint32_t MSI_data; /* Base data */		A_UINT32 MSI_data; /* Base data */
	uint32_t MSI_fw_intr_data; /* Data for firmware interrupt;		A_UINT32 MSI_fw_intr_data; /* Data for firmware interrupt;
	MSI data for other interrupts are		MSI data for other interrupts are
	in various SoC registers */		in various SoC registers */

	uint32_t power_mgmt_method; /* PCIE_PWR_METHOD_* */		A_UINT32 power_mgmt_method; /* PCIE_PWR_METHOD_* */
	uint32_t config_flags; /* PCIE_CONFIG_FLAG_* */		A_UINT32 config_flags; /* PCIE_CONFIG_FLAG_* */
	};		};

	/*		/*
	* PCIE_CONFIG_FLAG definitions		* PCIE_CONFIG_FLAG definitions
	*/		*/
	#if defined(AR900B)
	#define CE_PKTLOG_PIPE 8 /* used by both host and target side */
	#endif

	#define PCIE_CONFIG_FLAG_ENABLE_L1 0x0000001		#define PCIE_CONFIG_FLAG_ENABLE_L1 0x0000001
			#define CE_PKTLOG_PIPE 8 /* used by both host and target side */

	#define PCIE_CONFIG_FLAG_CLK_GATING_L1 0x0000001		#define PCIE_CONFIG_FLAG_CLK_GATING_L1 0x0000001
	#define PCIE_CONFIG_FLAG_CLK_SWITCH_WAIT 0x0000002		#define PCIE_CONFIG_FLAG_CLK_SWITCH_WAIT 0x0000002
	#define PCIE_CONFIG_FLAG_AXI_CLK_GATE 0x0000004		#define PCIE_CONFIG_FLAG_AXI_CLK_GATE 0x0000004
	@@ -100,12 +103,12 @@ struct pcie_state_s {
	* Passed from Host to Target during startup (one per CE).		* Passed from Host to Target during startup (one per CE).
	*/		*/
	struct CE_pipe_config {		struct CE_pipe_config {
	uint32_t pipenum;		A_UINT32 pipenum;
	uint32_t pipedir;		A_UINT32 pipedir;
	uint32_t nentries;		A_UINT32 nentries;
	uint32_t nbytes_max;		A_UINT32 nbytes_max;
	uint32_t flags;		A_UINT32 flags;
	uint32_t reserved;		A_UINT32 reserved;
	};		};

	#endif /* __CEPCI_H__ */		#endif /* __CEPCI_H__ */