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Commit 05a8a504 authored by Viswanadha Raju Thotakura's avatar Viswanadha Raju Thotakura Committed by Rajesh Bondugula
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msm: camera: Correct the settings for csiphy clock lane 



Correct the mission mode settings for csiphy clock lane.
Different settings must be programed for clock and data lanes.

CRs-Fixed: 2009805
Change-Id: Id47cf75e36659b486c0a6e3729356954975e306c
Signed-off-by: default avatarViswanadha Raju Thotakura <viswanad@codeaurora.org>
Signed-off-by: default avatarRajesh Bondugula <rajeshb@codeaurora.org>
parent 2dc96b1c

drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_5_0_1_hwreg.h

+2 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -99,6 +99,7 @@ struct csiphy_reg_3ph_parms_t csiphy_v5_0_1_3ph = { 
	{0x70C, 0xA5},

	{0x38, 0xFE},

	{0x81c, 0x2},

	{0x700, 0x80},

};



struct csiphy_settings_t csiphy_combo_mode_v5_0_1 = {

drivers/media/platform/msm/camera_v2/sensor/csiphy/include/msm_csiphy_5_0_hwreg.h

+2 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -100,6 +100,7 @@ struct csiphy_reg_3ph_parms_t csiphy_v5_0_3ph = { 
	{0x70C, 0x16},

	{0x38, 0xFE},

	{0x81c, 0x6},

	{0x700, 0x80},

};



struct csiphy_settings_t csiphy_combo_mode_v5_0 = {

drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c

+17 −7
Original line number Diff line number Diff line 
/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -46,6 +46,7 @@ 
#define MSM_CSIPHY_DRV_NAME                      "msm_csiphy"

#define CLK_LANE_OFFSET                             1

#define NUM_LANES_OFFSET                            4

#define CLOCK_LANE                                  0x02



#define CSI_3PHASE_HW                               1

#define MAX_DPHY_DATA_LN                            4
@@ -683,12 +684,21 @@ static int msm_csiphy_2phase_lane_config_v50( 
				csiphybase + csiphy_dev->ctrl_reg->

				csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_ctrl15.addr + offset);

			if (mask == CLOCK_LANE)

				msm_camera_io_w(csiphy_dev->ctrl_reg->

					csiphy_3ph_reg.

					mipi_csiphy_2ph_lnck_ctrl0.data,

					csiphybase + csiphy_dev->ctrl_reg->

					csiphy_3ph_reg.

					mipi_csiphy_2ph_lnck_ctrl0.addr);

			else

				msm_camera_io_w(csiphy_dev->ctrl_reg->

					csiphy_3ph_reg.

					mipi_csiphy_2ph_lnn_ctrl0.data,

					csiphybase + csiphy_dev->ctrl_reg->

					csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_ctrl0.addr + offset);

					mipi_csiphy_2ph_lnn_ctrl0.addr +

					offset);

			msm_camera_io_w(csiphy_dev->ctrl_reg->

				csiphy_3ph_reg.

				mipi_csiphy_2ph_lnn_cfg1.data,

drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h

+2 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.

/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -141,6 +141,7 @@ struct csiphy_reg_3ph_parms_t { 
	struct csiphy_reg_t mipi_csiphy_2ph_lnck_ctrl3;

	struct csiphy_reg_t mipi_csiphy_2ph_lnn_ctrl14;

	struct csiphy_reg_t mipi_csiphy_3ph_cmn_ctrl7_cphy;

	struct csiphy_reg_t mipi_csiphy_2ph_lnck_ctrl0;

};



struct csiphy_ctrl_t {