Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 057d8688 authored by Subhash Jadavani's avatar Subhash Jadavani
Browse files

scsi: ufs-qcom: update clock scaling sequence 



Update UFS clock frequency scaling sequence as specified in updated
Hardware Programming Guide.

Change-Id: Ief5df61d91fbd765c595533b3380a602a2540e5e
Signed-off-by: default avatarSubhash Jadavani <subhashj@codeaurora.org>
parent 85d7e134

drivers/scsi/ufs/ufs-qcom.c

+36 −48
Original line number Diff line number Diff line
@@ -412,8 +412,9 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, 
/**

 * Returns zero for success and non-zero in case of a failure

 */

static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear,

			       u32 hs, u32 rate, bool update_link_startup_timer)

static int __ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear,

			       u32 hs, u32 rate, bool update_link_startup_timer,

			       bool is_pre_scale_up)

{

	int ret = 0;

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);
@@ -460,9 +461,13 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, 
	}



	list_for_each_entry(clki, &hba->clk_list_head, list) {

		if (!strcmp(clki->name, "core_clk"))

		if (!strcmp(clki->name, "core_clk")) {

			if (is_pre_scale_up)

				core_clk_rate = clki->max_freq;

			else

				core_clk_rate = clk_get_rate(clki->clk);

		}

	}



	/* If frequency is smaller than 1MHz, set to 1MHz */

	if (core_clk_rate < DEFAULT_CLK_RATE_HZ)
@@ -558,6 +563,13 @@ out: 
	return ret;

}



static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear,

			       u32 hs, u32 rate, bool update_link_startup_timer)

{

	return  __ufs_qcom_cfg_timers(hba, gear, hs, rate,

				      update_link_startup_timer, false);

}



static int ufs_qcom_link_startup_pre_change(struct ufs_hba *hba)

{

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);
@@ -2160,61 +2172,49 @@ out: 
static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba)

{

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);

	struct ufs_pa_layer_attr *attr = &host->dev_req_params;

	int err = 0;



	if (!ufs_qcom_cap_qunipro(host))

		return 0;



	return ufs_qcom_configure_lpm(hba, false);

}

		goto out;



static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba)

{

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);

	err = ufs_qcom_configure_lpm(hba, false);

	if (err)

		goto out;



	if (!ufs_qcom_cap_qunipro(host))

		return 0;

	if (attr)

		__ufs_qcom_cfg_timers(hba, attr->gear_rx, attr->pwr_rx,

				      attr->hs_rate, false, true);



	/* set unipro core clock cycles to 150 and clear clock divider */

	return ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div(hba, 150);

	err = ufs_qcom_set_dme_vs_core_clk_ctrl_clear_div(hba, 150);

out:

	return err;

}



static int ufs_qcom_clk_scale_down_pre_change(struct ufs_hba *hba)

{

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);

	u32 core_clk_ctrl_reg;

	int err = 0;



	if (!ufs_qcom_cap_qunipro(host))

		goto out;



	err = ufs_qcom_configure_lpm(hba, true);

	if (err)

		goto out;



	err = ufshcd_dme_get(hba,

			    UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL),

			    &core_clk_ctrl_reg);

		return 0;



	/* make sure CORE_CLK_DIV_EN is cleared */

	if (!err &&

	    (core_clk_ctrl_reg & DME_VS_CORE_CLK_CTRL_CORE_CLK_DIV_EN_BIT)) {

		core_clk_ctrl_reg &= ~DME_VS_CORE_CLK_CTRL_CORE_CLK_DIV_EN_BIT;

		err = ufshcd_dme_set(hba,

				    UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL),

				    core_clk_ctrl_reg);

	}

out:

	return err;

	return ufs_qcom_configure_lpm(hba, true);

}



static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba)

{

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);

	struct ufs_pa_layer_attr *attr = &host->dev_req_params;

	int err = 0;



	if (!ufs_qcom_cap_qunipro(host))

		return 0;



	if (attr)

		ufs_qcom_cfg_timers(hba, attr->gear_rx, attr->pwr_rx,

				    attr->hs_rate, false);



	if (ufs_qcom_cap_svs2(host))

		/*

		 * For SVS2 set unipro core clock cycles to 37 and
@@ -2235,7 +2235,6 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, 
		bool scale_up, enum ufs_notify_change_status status)

{

	struct ufs_qcom_host *host = ufshcd_get_variant(hba);

	struct ufs_pa_layer_attr *dev_req_params = &host->dev_req_params;

	int err = 0;



	switch (status) {
@@ -2246,19 +2245,9 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, 
			err = ufs_qcom_clk_scale_down_pre_change(hba);

		break;

	case POST_CHANGE:

		if (scale_up)

			err = ufs_qcom_clk_scale_up_post_change(hba);

		else

		if (!scale_up)

			err = ufs_qcom_clk_scale_down_post_change(hba);



		if (err || !dev_req_params)

			goto out;



		ufs_qcom_cfg_timers(hba,

				    dev_req_params->gear_rx,

				    dev_req_params->pwr_rx,

				    dev_req_params->hs_rate,

				    false);

		ufs_qcom_update_bus_bw_vote(host);

		break;

	default:
@@ -2267,7 +2256,6 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, 
		break;

	}



out:

	return err;

}