Loading arch/arm/boot/dts/qcom/sdm660-common.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -181,6 +181,7 @@ "cfg_ahb_clk", "xo"; qcom,core-clk-rate = <133330000>; qcom,core-clk-rate-hs = <66666667>; resets = <&clock_gcc GCC_USB_30_BCR>; reset-names = "core_reset"; Loading Loading
arch/arm/boot/dts/qcom/sdm660-common.dtsi +1 −0 Original line number Diff line number Diff line Loading @@ -181,6 +181,7 @@ "cfg_ahb_clk", "xo"; qcom,core-clk-rate = <133330000>; qcom,core-clk-rate-hs = <66666667>; resets = <&clock_gcc GCC_USB_30_BCR>; reset-names = "core_reset"; Loading