Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 04332db3 authored by Bharathraj Nagaraju's avatar Bharathraj Nagaraju Committed by Gerrit - the friendly Code Review server
Browse files

ARM: dts: msm: Add support for MSM8996 Mizar platform



Add device tree files needed to support MSM8996 based
mizar platform.

Change-Id: Ife6c6659b981b37c6b9d9cbb0a0c106488f1e07f
Signed-off-by: default avatarBharathraj Nagaraju <snbraj@codeaurora.org>
parent ae2f6cb5
Loading
Loading
Loading
Loading
+2 −1
Original line number Diff line number Diff line
@@ -113,7 +113,8 @@ dtb-$(CONFIG_ARCH_MSM8996) += msm8996-v2-pmi8994-cdp.dtb \
	apq8096-v3-pmi8994-mdm9x55-slimbus-mtp.dtb \
	apq8096-v3-pmi8996-mdm9x55-i2s-mtp.dtb \
	apq8096-v3-pmi8996-mdm9x55-slimbus-mtp.dtb \
	apq8096-v3-pmi8996-dragonboard.dtb
	apq8096-v3-pmi8996-dragonboard.dtb \
	msm8996-auto-mizar.dtb

dtb-$(CONFIG_MSM_GVM_QUIN) += vplatform-lfv-msm8996-telematics.dtb \
	vplatform-lfv-msm8996-ivi.dtb
+328 −0
Original line number Diff line number Diff line
/* Copyright (c) 2017, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
 * only version 2 as published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include "msm8996pro.dtsi"
#include "msm8996-pm8994.dtsi"
#include "msm8996-agave-adp.dtsi"
#include "msm8996pro-auto.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. MSM 8996pro AUTO ADP";
	compatible = "qcom,msm8996-adp", "qcom,msm8996", "qcom,adp";
	qcom,msm-id = <315 0x10001>;
	qcom,board-id = <0x06010019 0>, <0x00010001 0>;
};

&spi_9 {
	status = "ok";
	can-controller@0 {
		compatible = "renesas,rh850";
		reg = <0>;
		interrupt-parent = <&tlmm>;
		interrupts = <122 0>;
		spi-max-frequency = <5000000>;
	};
};

&soc {
	qcom,msm-ssc-sensors {
		status = "disabled";
	};

	qcom,msm-thermal {
		qcom,hotplug-temp = <115>;
		qcom,hotplug-temp-hysteresis = <25>;
		qcom,therm-reset-temp = <119>;
	};

	qcom,adv7481@70 {
		status = "disabled";
	};

	qcom,ntn_avb {
		qcom,ntn-rc-num = <2>;
	};

	i2c@75b6000 { /* BLSP8 */
		/* ADV7533 HDMI Bridge Chip removed on ADP Lite */
		adv7533@39 {
			status = "disabled";
		};

		adv7533@3d {
			status = "disabled";
		};
	};

};

&cci {
	qcom,camera@0 {
		pinctrl-names = "cam_default", "cam_suspend","default";
		pinctrl-2 = <&mx9296_pwr>;
		qcom,cci-master = <0>;
	};
};

&tlmm {
	pcie2 {
		pcie2_perst_default: pcie2_perst_default {
			mux {
				pins = "gpio90";
				function = "gpio";
			};

			config {
				pins = "gpio90";
				drive-strength = <2>;
				bias-pull-down;
			};
		};

		pcie2_wake_default: pcie2_wake_default {
			mux {
				pins = "gpio54";
				function = "gpio";
			};

			config {
				pins = "gpio54";
				drive-strength = <2>;
				bias-pull-down;
			};
		};
	};

	mx9296_pwr: mx9296_pwr {
		mux {
			pins = "gpio21";
			function = "gpio";
		};

		config {
			pins = "gpio21";
			drive-strength = <2>;
			bias-pull-up;
			output-high;
		};
	};
};

&pil_modem {
	pinctrl-names = "default";
	pinctrl-0 = <&modem_mux>;
};

&slim_msm {
	status = "disabled";
};

&pm8994_mpps {
	mpp@a500 { /* MPP 6 */
		qcom,mode = <1>;		/* Digital output */
		qcom,output-type = <0>;		/* CMOS logic */
		qcom,vin-sel = <2>;		/* S4 1.8V */
		qcom,src-sel = <0>;		/* Constant */
		qcom,master-en = <1>;		/* Enable GPIO */
		status = "okay";
	};
};

&sdhc_2 {
	cd-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
	pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on_sbc>;
	pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off
			&sdc2_cd_on_sbc>;
};

&i2c_7 {
	silabs4705@11 { /* SiLabs FM chip, slave id 0x11*/
		status = "disabled";
	};
};

&pcie0 {
	qcom,phy-sequence = <0x404 0x01 0x00
				0x034 0x1c 0x00
				0x038 0x10 0x00
				0x174 0x33 0x00
				0x194 0x06 0x00
				0x0c8 0x42 0x00
				0x128 0x00 0x00
				0x144 0xff 0x00
				0x148 0x1f 0x00
				0x178 0x01 0x00
				0x19c 0x01 0x00
				0x18c 0x00 0x00
				0x184 0x0a 0x00
				0x00c 0x09 0x00
				0x0d0 0x82 0x00
				0x0e4 0x03 0x00
				0x0e0 0x55 0x00
				0x0dc 0x55 0x00
				0x054 0x00 0x00
				0x050 0x1a 0x00
				0x04c 0x0a 0x00
				0x174 0x33 0x00
				0x03c 0x02 0x00
				0x040 0x1f 0x00
				0x0ac 0x04 0x00
				0x078 0x0b 0x00
				0x084 0x16 0x00
				0x090 0x28 0x00
				0x10c 0x00 0x00
				0x108 0x80 0x00
				0x010 0x00 0x00
				0x01c 0x31 0x00
				0x020 0x01 0x00
				0x014 0x02 0x00
				0x018 0x00 0x00
				0x024 0x2f 0x00
				0x028 0x19 0x00
				0x0c4 0x15 0x00
				0x070 0x0f 0x00
				0x048 0x0f 0x00
				0x074 0x19 0x00
				0x038 0x10 0x00
				0x178 0x00 0x00
				0x0c4 0x40 0x00
				0x400 0x00 0x00
				0x408 0x03 0x00>;

	qcom,port-phy-sequence = <0x1068 0x45 0x00
				0x1094 0x06 0x00
				0x1310 0x1c 0x00
				0x1318 0x17 0x00
				0x12d8 0x01 0x00
				0x12dc 0x00 0x00
				0x12e0 0xdb 0x00
				0x1320 0x18 0x00
				0x121c 0x04 0x00
				0x1210 0x04 0x00
				0x1458 0x4c 0x00
				0x14a0 0x00 0x00
				0x14a4 0x01 0x00
				0x14a8 0x05 0x00
				0x1248 0x4b 0x00
				0x131c 0x14 0x00
				0x1454 0x05 0x00
				0x1404 0x02 0x00
				0x146c 0x00 0x00
				0x1460 0xa3 0x00
				0x1318 0x19 0x00
				0x1428 0x0e 0x00
				0x1054 0x08 0x00
				0x14f8 0x04 0x00
				0x14ec 0x06 0x00
				0x104c 0x2e 0x00
				0x1404 0x03 0x0a
				0x1400 0x00 0x00
				0x1408 0x0a 0x00>;

	/delete-property/qcom,l1-supported;
	/delete-property/qcom,l1ss-supported;
	qcom,aux-clk-sync;
	qcom,boot-option = <0x0>;
};

&pcie1 {
	qcom,phy-sequence = <0x404 0x01 0x00
				0x034 0x1c 0x00
				0x038 0x10 0x00
				0x174 0x33 0x00
				0x194 0x06 0x00
				0x0c8 0x42 0x00
				0x128 0x00 0x00
				0x144 0xff 0x00
				0x148 0x1f 0x00
				0x178 0x01 0x00
				0x19c 0x01 0x00
				0x18c 0x00 0x00
				0x184 0x0a 0x00
				0x00c 0x09 0x00
				0x0d0 0x82 0x00
				0x0e4 0x03 0x00
				0x0e0 0x55 0x00
				0x0dc 0x55 0x00
				0x054 0x00 0x00
				0x050 0x1a 0x00
				0x04c 0x0a 0x00
				0x174 0x33 0x00
				0x03c 0x02 0x00
				0x040 0x1f 0x00
				0x0ac 0x04 0x00
				0x078 0x0b 0x00
				0x084 0x16 0x00
				0x090 0x28 0x00
				0x10c 0x00 0x00
				0x108 0x80 0x00
				0x010 0x00 0x00
				0x01c 0x31 0x00
				0x020 0x01 0x00
				0x014 0x02 0x00
				0x018 0x00 0x00
				0x024 0x2f 0x00
				0x028 0x19 0x00
				0x0c4 0x15 0x00
				0x070 0x0f 0x00
				0x048 0x0f 0x00
				0x074 0x19 0x00
				0x038 0x10 0x00
				0x178 0x00 0x00
				0x0c4 0x40 0x00
				0x400 0x00 0x00
				0x408 0x03 0x00>;

	qcom,port-phy-sequence = <0x2068 0x45 0x00
				0x2094 0x06 0x00
				0x2310 0x1c 0x00
				0x2318 0x17 0x00
				0x22d8 0x01 0x00
				0x22dc 0x00 0x00
				0x22e0 0xdb 0x00
				0x2320 0x18 0x00
				0x221c 0x04 0x00
				0x2210 0x04 0x00
				0x2458 0x4c 0x00
				0x24a0 0x00 0x00
				0x24a4 0x01 0x00
				0x24a8 0x05 0x00
				0x2248 0x4b 0x00
				0x231c 0x14 0x00
				0x2454 0x05 0x00
				0x2404 0x02 0x00
				0x246c 0x00 0x00
				0x2460 0xa3 0x00
				0x2318 0x19 0x00
				0x2428 0x0e 0x00
				0x2054 0x08 0x00
				0x24f8 0x04 0x00
				0x24ec 0x06 0x00
				0x204c 0x2e 0x00
				0x2404 0x03 0x0a
				0x2400 0x00 0x00
				0x2408 0x0a 0x00>;

	/delete-property/qcom,l1-supported;
	/delete-property/qcom,l1ss-supported;
	/delete-property/qcom,aux-clk-sync;
	qcom,boot-option = <0x0>;
};

&pcie2 {
	qcom,boot-option = <0x0>;
	perst-gpio = <&tlmm 90 0>;
	wake-gpio = <&tlmm 54 0>;
};