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Commit 03451c88 authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
Browse files

qpnp-fg-gen3: add support to configure jeita hysteresis



GEN3 FG has jeita hysteresis support in hardware. Add support
to configure the hysteresis applied to jeita temperature via
a device tree property.

While at it, fix reading the JEITA thresholds from device tree
property where the total size of the elements was used instead
of the total number of elements.

Change-Id: I1d468f1291224de0f781ca71cbc1374a29d7c790
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent 110f6342
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+8 −0
Original line number Diff line number Diff line
@@ -202,6 +202,14 @@ First Level Node - FG Gen3 device
		    capacity learning cycle. If this is not specified, then
		    the default value is 0. Unit is in decipercentage.

- qcom,fg-jeita-hyst-temp
	Usage:      optional
	Value type: <u32>
	Definition: Hysteresis applied to Jeita temperature comparison.
		    Possible values are:
			0 - No hysteresis
			1,2,3 - Value in Celsius.

==========================================================
Second Level Nodes - Peripherals managed by FG Gen3 driver
==========================================================
+1 −0
Original line number Diff line number Diff line
@@ -193,6 +193,7 @@ struct fg_dt_props {
	int	cl_max_cap_dec;
	int	cl_max_cap_limit;
	int	cl_min_cap_limit;
	int	jeita_hyst_temp;
};

/* parameters from battery profile */
+1 −0
Original line number Diff line number Diff line
@@ -126,6 +126,7 @@

/* BATT_INFO_BATT_TEMP_CFG */
#define JEITA_TEMP_HYST_MASK			GENMASK(5, 4)
#define JEITA_TEMP_HYST_SHIFT			4
#define JEITA_TEMP_NO_HYST			0x0
#define JEITA_TEMP_HYST_1C			0x1
#define JEITA_TEMP_HYST_2C			0x2
+25 −10
Original line number Diff line number Diff line
@@ -1839,6 +1839,16 @@ static int fg_hw_init(struct fg_chip *chip)
	if (chip->cyc_ctr.en)
		restore_cycle_counter(chip);

	if (chip->dt.jeita_hyst_temp >= 0) {
		val = chip->dt.jeita_hyst_temp << JEITA_TEMP_HYST_SHIFT;
		rc = fg_masked_write(chip, BATT_INFO_BATT_TEMP_CFG(chip),
			JEITA_TEMP_HYST_MASK, val);
		if (rc < 0) {
			pr_err("Error in writing batt_temp_cfg, rc=%d\n", rc);
			return rc;
		}
	}

	return 0;
}

@@ -2111,7 +2121,7 @@ static int fg_parse_dt(struct fg_chip *chip)
	struct device_node *child, *revid_node, *node = chip->dev->of_node;
	u32 base, temp;
	u8 subtype;
	int rc, len;
	int rc;

	if (!node)  {
		dev_err(chip->dev, "device tree node missing\n");
@@ -2260,16 +2270,15 @@ static int fg_parse_dt(struct fg_chip *chip)
	chip->dt.jeita_thresholds[JEITA_COOL] = DEFAULT_BATT_TEMP_COOL;
	chip->dt.jeita_thresholds[JEITA_WARM] = DEFAULT_BATT_TEMP_WARM;
	chip->dt.jeita_thresholds[JEITA_HOT] = DEFAULT_BATT_TEMP_HOT;
	if (of_find_property(node, "qcom,fg-jeita-thresholds", &len)) {
		if (len == NUM_JEITA_LEVELS) {
	if (of_property_count_elems_of_size(node, "qcom,fg-jeita-thresholds",
		sizeof(u32)) == NUM_JEITA_LEVELS) {
		rc = of_property_read_u32_array(node,
				"qcom,fg-jeita-thresholds",
					chip->dt.jeita_thresholds, len);
				chip->dt.jeita_thresholds, NUM_JEITA_LEVELS);
		if (rc < 0)
			pr_warn("Error reading Jeita thresholds, default values will be used rc:%d\n",
				rc);
	}
	}

	rc = of_property_read_u32(node, "qcom,fg-esr-timer-charging", &temp);
	if (rc < 0)
@@ -2338,6 +2347,12 @@ static int fg_parse_dt(struct fg_chip *chip)
	else
		chip->dt.cl_max_cap_limit = temp;

	rc = of_property_read_u32(node, "qcom,fg-jeita-hyst-temp", &temp);
	if (rc < 0)
		chip->dt.jeita_hyst_temp = -EINVAL;
	else
		chip->dt.jeita_hyst_temp = temp;

	return 0;
}