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Commit 02e860bd authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "msm/drm: Move msm_drm_config configuration into the GPUs"

parents 82fffc58 d84fd15d

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+8 −1
Original line number Diff line number Diff line
@@ -466,6 +466,7 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) 
	struct msm_gpu *gpu;

	struct msm_drm_private *priv = dev->dev_private;

	struct platform_device *pdev = priv->gpu_pdev;

	struct msm_gpu_config a3xx_config = { 0 };

	int ret;



	if (!pdev) {
@@ -491,7 +492,13 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) 
	adreno_gpu->registers = a3xx_registers;

	adreno_gpu->reg_offsets = a3xx_register_offsets;



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);

	a3xx_config.ioname = MSM_GPU_DEFAULT_IONAME;

	a3xx_config.irqname = MSM_GPU_DEFAULT_IRQNAME;

	a3xx_config.nr_rings = 1;

	a3xx_config.va_start = 0x300000;

	a3xx_config.va_end = 0xffffffff;



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, &a3xx_config);

	if (ret)

		goto fail;

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+8 −1
Original line number Diff line number Diff line
@@ -543,6 +543,7 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev) 
	struct msm_gpu *gpu;

	struct msm_drm_private *priv = dev->dev_private;

	struct platform_device *pdev = priv->gpu_pdev;

	struct msm_gpu_config a4xx_config = { 0 };

	int ret;



	if (!pdev) {
@@ -568,7 +569,13 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev) 
	adreno_gpu->registers = a4xx_registers;

	adreno_gpu->reg_offsets = a4xx_register_offsets;



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 1);

	a4xx_config.ioname = MSM_GPU_DEFAULT_IONAME;

	a4xx_config.irqname = MSM_GPU_DEFAULT_IRQNAME;

	a4xx_config.nr_rings = 1;

	a4xx_config.va_start = 0x300000;

	a4xx_config.va_end = 0xffffffff;



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, &a4xx_config);

	if (ret)

		goto fail;

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

+15 −1
Original line number Diff line number Diff line
@@ -1368,6 +1368,7 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) 
	struct a5xx_gpu *a5xx_gpu = NULL;

	struct adreno_gpu *adreno_gpu;

	struct msm_gpu *gpu;

	struct msm_gpu_config a5xx_config = { 0 };

	int ret;



	if (!pdev) {
@@ -1391,7 +1392,20 @@ struct msm_gpu *a5xx_gpu_init(struct drm_device *dev) 
	/* Check the efuses for some configuration */

	a5xx_efuses_read(pdev, adreno_gpu);



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, 4);

	a5xx_config.ioname = MSM_GPU_DEFAULT_IONAME;

	a5xx_config.irqname = MSM_GPU_DEFAULT_IRQNAME;



	/* Set the number of rings to 4 - yay preemption */

	a5xx_config.nr_rings = 4;



	/*

	 * Set the user domain range to fall into the TTBR1 region for global

	 * objects

	 */

	a5xx_config.va_start = 0x800000000;

	a5xx_config.va_end = 0x8ffffffff;



	ret = adreno_gpu_init(dev, pdev, adreno_gpu, &funcs, &a5xx_config);

	if (ret) {

		a5xx_destroy(&(a5xx_gpu->base.base));

		return ERR_PTR(ret);

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+7 −30
Original line number Diff line number Diff line
@@ -405,10 +405,6 @@ void adreno_wait_ring(struct msm_ringbuffer *ring, uint32_t ndwords) 
			ring->gpu->name, ring->id);

}



static const char *iommu_ports[] = {

		"gfx3d_user",

};



/* Read the set of powerlevels */

static int _adreno_get_pwrlevels(struct msm_gpu *gpu, struct device_node *node)

{
@@ -524,10 +520,10 @@ static int adreno_of_parse(struct platform_device *pdev, struct msm_gpu *gpu) 


int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,

		struct adreno_gpu *adreno_gpu,

		const struct adreno_gpu_funcs *funcs, int nr_rings)

		const struct adreno_gpu_funcs *funcs,

		struct msm_gpu_config *gpu_config)

{

	struct adreno_platform_config *config = pdev->dev.platform_data;

	struct msm_gpu_config adreno_gpu_config  = { 0 };

	struct msm_gpu *gpu = &adreno_gpu->base;

	struct msm_mmu *mmu;

	int ret;
@@ -541,26 +537,8 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 
	/* Get the rest of the target configuration from the device tree */

	adreno_of_parse(pdev, gpu);



	adreno_gpu_config.ioname = "kgsl_3d0_reg_memory";

	adreno_gpu_config.irqname = "kgsl_3d0_irq";

	adreno_gpu_config.nr_rings = nr_rings;



	adreno_gpu_config.va_start = SZ_16M;

	adreno_gpu_config.va_end = 0xffffffff;



	if (adreno_gpu->revn >= 500) {

		/* 5XX targets use a 64 bit region */

		adreno_gpu_config.va_start = 0x800000000;

		adreno_gpu_config.va_end = 0x8ffffffff;

	} else {

		adreno_gpu_config.va_start = 0x300000;

		adreno_gpu_config.va_end = 0xffffffff;

	}



	adreno_gpu_config.nr_rings = nr_rings;



	ret = msm_gpu_init(drm, pdev, &adreno_gpu->base, &funcs->base,

			adreno_gpu->info->name, &adreno_gpu_config);

			adreno_gpu->info->name, gpu_config);

	if (ret)

		return ret;
@@ -580,8 +558,7 @@ int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev, 


	mmu = gpu->aspace->mmu;

	if (mmu) {

		ret = mmu->funcs->attach(mmu, iommu_ports,

				ARRAY_SIZE(iommu_ports));

		ret = mmu->funcs->attach(mmu, NULL, 0);

		if (ret)

			return ret;

	}
@@ -722,7 +699,7 @@ static struct adreno_counter_group *get_counter_group(struct msm_gpu *gpu, 
		return ERR_PTR(-ENODEV);



	if (groupid >= adreno_gpu->nr_counter_groups)

		return ERR_PTR(-EINVAL);

		return ERR_PTR(-ENODEV);



	return (struct adreno_counter_group *)

		adreno_gpu->counter_groups[groupid];
@@ -745,7 +722,7 @@ u64 adreno_read_counter(struct msm_gpu *gpu, u32 groupid, int counterid) 
	struct adreno_counter_group *group =

		get_counter_group(gpu, groupid);



	if (!IS_ERR(group) && group->funcs.read)

	if (!IS_ERR_OR_NULL(group) && group->funcs.read)

		return group->funcs.read(gpu, group, counterid);



	return 0;
@@ -756,6 +733,6 @@ void adreno_put_counter(struct msm_gpu *gpu, u32 groupid, int counterid) 
	struct adreno_counter_group *group =

		get_counter_group(gpu, groupid);



	if (!IS_ERR(group) && group->funcs.put)

	if (!IS_ERR_OR_NULL(group) && group->funcs.put)

		group->funcs.put(gpu, group, counterid);

}

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+1 −1
Original line number Diff line number Diff line
@@ -257,7 +257,7 @@ struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu); 


int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,

		struct adreno_gpu *gpu, const struct adreno_gpu_funcs *funcs,

		int nr_rings);

		struct msm_gpu_config *config);

void adreno_gpu_cleanup(struct adreno_gpu *gpu);



void adreno_snapshot(struct msm_gpu *gpu, struct msm_snapshot *snapshot);