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Commit fe86175b authored by Randy Dunlap's avatar Randy Dunlap Committed by Linus Torvalds
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atyfb: fix CONFIG_ namespace violations 



Fix namespace violations by changing non-kconfig CONFIG_ names to CNFG_*.

Fixes breakage in staging/, which adds a real CONFIG_PANEL.

Signed-off-by: default avatarRandy Dunlap <randy.dunlap@oracle.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent cd29cf7d

drivers/video/aty/aty128fb.c

+4 −4
Original line number Diff line number Diff line
@@ -1475,7 +1475,7 @@ static int aty128fb_set_par(struct fb_info *info) 
	aty128_set_pll(&par->pll, par);

	aty128_set_fifo(&par->fifo_reg, par);



	config = aty_ld_le32(CONFIG_CNTL) & ~3;

	config = aty_ld_le32(CNFG_CNTL) & ~3;



#if defined(__BIG_ENDIAN)

	if (par->crtc.bpp == 32)
@@ -1484,7 +1484,7 @@ static int aty128fb_set_par(struct fb_info *info) 
		config |= 1;	/* make aperture do 16 bit swapping */

#endif



	aty_st_le32(CONFIG_CNTL, config);

	aty_st_le32(CNFG_CNTL, config);

	aty_st_8(CRTC_EXT_CNTL + 1, 0);	/* turn the video back on */



	info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3;
@@ -1875,7 +1875,7 @@ static int __devinit aty128_init(struct pci_dev *pdev, const struct pci_device_i 
	u32 dac;



	/* Get the chip revision */

	chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F;

	chip_rev = (aty_ld_le32(CNFG_CNTL) >> 16) & 0x1F;



	strcpy(video_card, "Rage128 XX ");

	video_card[8] = ent->device >> 8;
@@ -2057,7 +2057,7 @@ static int __devinit aty128_probe(struct pci_dev *pdev, const struct pci_device_ 


	/* Grab memory size from the card */

	// How does this relate to the resource length from the PCI hardware?

	par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;

	par->vram_size = aty_ld_le32(CNFG_MEMSIZE) & 0x03FFFFFF;



	/* Virtualize the framebuffer */

	info->screen_base = ioremap(fb_addr, par->vram_size);

drivers/video/aty/atyfb_base.c

+11 −11
Original line number Diff line number Diff line
@@ -135,7 +135,7 @@ 
#if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \

defined (CONFIG_FB_ATY_GENERIC_LCD) || defined(CONFIG_FB_ATY_BACKLIGHT)

static const u32 lt_lcd_regs[] = {

	CONFIG_PANEL_LG,

	CNFG_PANEL_LG,

	LCD_GEN_CNTL_LG,

	DSTN_CONTROL_LG,

	HFB_PITCH_ADDR_LG,
@@ -446,7 +446,7 @@ static int __devinit correct_chipset(struct atyfb_par *par) 
	par->pll_limits.ecp_max = aty_chips[i].ecp_max;

	par->features = aty_chips[i].features;



	chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);

	chip_id = aty_ld_le32(CNFG_CHIP_ID, par);

	type = chip_id & CFG_CHIP_TYPE;

	rev = (chip_id & CFG_CHIP_REV) >> 24;
@@ -629,7 +629,7 @@ static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc) 
		    crtc->lcd_index = aty_ld_le32(LCD_INDEX, par);

		    aty_st_le32(LCD_INDEX, crtc->lcd_index, par);

		}

		crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par);

		crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par);

		crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par);
@@ -676,7 +676,7 @@ static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc) 
		aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN), par);



		/* update non-shadow registers first */

		aty_st_lcd(CONFIG_PANEL, crtc->lcd_config_panel, par);

		aty_st_lcd(CNFG_PANEL, crtc->lcd_config_panel, par);

		aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl &

			~(CRTC_RW_SELECT | SHADOW_EN | SHADOW_RW_EN), par);
@@ -858,7 +858,7 @@ static int aty_var_to_crtc(const struct fb_info *info, 
		if (!M64_HAS(MOBIL_BUS))

			crtc->lcd_index |= CRTC2_DISPLAY_DIS;



		crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par) | 0x4000;

		crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000;

		crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT;



		crtc->lcd_gen_cntl &=
@@ -2254,7 +2254,7 @@ static int __devinit aty_init(struct fb_info *info) 
	if (!M64_HAS(INTEGRATED)) {

		u32 stat0;

		u8 dac_type, dac_subtype, clk_type;

		stat0 = aty_ld_le32(CONFIG_STAT0, par);

		stat0 = aty_ld_le32(CNFG_STAT0, par);

		par->bus_type = (stat0 >> 0) & 0x07;

		par->ram_type = (stat0 >> 3) & 0x07;

		ramname = aty_gx_ram[par->ram_type];
@@ -2324,7 +2324,7 @@ static int __devinit aty_init(struct fb_info *info) 
		par->dac_ops = &aty_dac_ct;

		par->pll_ops = &aty_pll_ct;

		par->bus_type = PCI;

		par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07);

		par->ram_type = (aty_ld_le32(CNFG_STAT0, par) & 0x07);

		ramname = aty_ct_ram[par->ram_type];

		/* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */

		if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM)
@@ -2433,7 +2433,7 @@ static int __devinit aty_init(struct fb_info *info) 
		}



	if (M64_HAS(MAGIC_VRAM_SIZE)) {

		if (aty_ld_le32(CONFIG_STAT1, par) & 0x40000000)

		if (aty_ld_le32(CNFG_STAT1, par) & 0x40000000)

			info->fix.smem_len += 0x400000;

	}
@@ -2946,7 +2946,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev, 
		 * Fix PROMs idea of MEM_CNTL settings...

		 */

		mem = aty_ld_le32(MEM_CNTL, par);

		chip_id = aty_ld_le32(CONFIG_CHIP_ID, par);

		chip_id = aty_ld_le32(CNFG_CHIP_ID, par);

		if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) && !((chip_id >> 24) & 1)) {

			switch (mem & 0x0f) {

			case 3:
@@ -2964,7 +2964,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev, 
			default:

				break;

			}

			if ((aty_ld_le32(CONFIG_STAT0, par) & 7) >= SDRAM)

			if ((aty_ld_le32(CNFG_STAT0, par) & 7) >= SDRAM)

				mem &= ~(0x00700000);

		}

		mem &= ~(0xcf80e000);	/* Turn off all undocumented bits. */
@@ -3572,7 +3572,7 @@ static int __init atyfb_atari_probe(void) 
		}



		/* Fake pci_id for correct_chipset() */

		switch (aty_ld_le32(CONFIG_CHIP_ID, par) & CFG_CHIP_TYPE) {

		switch (aty_ld_le32(CNFG_CHIP_ID, par) & CFG_CHIP_TYPE) {

		case 0x00d7:

			par->pci_id = PCI_CHIP_MACH64GX;

			break;

drivers/video/aty/radeon_base.c

+5 −5
Original line number Diff line number Diff line
@@ -1936,8 +1936,8 @@ static void fixup_memory_mappings(struct radeonfb_info *rinfo) 
	OUTREG(CRTC_GEN_CNTL, save_crtc_gen_cntl | CRTC_DISP_REQ_EN_B);

	mdelay(100);



	aper_base = INREG(CONFIG_APER_0_BASE);

	aper_size = INREG(CONFIG_APER_SIZE);

	aper_base = INREG(CNFG_APER_0_BASE);

	aper_size = INREG(CNFG_APER_SIZE);



#ifdef SET_MC_FB_FROM_APERTURE

	/* Set framebuffer to be at the same address as set in PCI BAR */
@@ -2024,11 +2024,11 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo) 
                     ~CRTC_H_CUTOFF_ACTIVE_EN);

          }

        } else {

          tmp = INREG(CONFIG_MEMSIZE);

          tmp = INREG(CNFG_MEMSIZE);

        }



	/* mem size is bits [28:0], mask off the rest */

	rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK;

	rinfo->video_ram = tmp & CNFG_MEMSIZE_MASK;



	/*

	 * Hack to get around some busted production M6's
@@ -2228,7 +2228,7 @@ static int __devinit radeonfb_pci_register (struct pci_dev *pdev, 
	 */

	rinfo->errata = 0;

	if (rinfo->family == CHIP_FAMILY_R300 &&

	    (INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK)

	    (INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK)

	    == CFG_ATI_REV_A11)

		rinfo->errata |= CHIP_ERRATA_R300_CG;

drivers/video/aty/radeon_pm.c

+9 −9
Original line number Diff line number Diff line
@@ -333,7 +333,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo) 
	if (!rinfo->has_CRTC2) {

                tmp = INPLL(pllSCLK_CNTL);



		if ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13)

		if ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13)

                    tmp &= ~(SCLK_CNTL__FORCE_CP	| SCLK_CNTL__FORCE_RB);

                tmp &= ~(SCLK_CNTL__FORCE_HDP		| SCLK_CNTL__FORCE_DISP1 |

			 SCLK_CNTL__FORCE_TOP		| SCLK_CNTL__FORCE_SE   |
@@ -468,9 +468,9 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo) 


	/*RAGE_6::A11 A12 A12N1 A13, RV250::A11 A12, R300*/

	if ((rinfo->family == CHIP_FAMILY_RV250 &&

	     ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) ||

	     ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) ||

	    ((rinfo->family == CHIP_FAMILY_RV100) &&

	     ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) {

	     ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) {

		tmp |= SCLK_CNTL__FORCE_CP;

		tmp |= SCLK_CNTL__FORCE_VIP;

	}
@@ -486,7 +486,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo) 
		/* RV200::A11 A12 RV250::A11 A12 */

		if (((rinfo->family == CHIP_FAMILY_RV200) ||

		     (rinfo->family == CHIP_FAMILY_RV250)) &&

		    ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13))

		    ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13))

			tmp |= SCLK_MORE_CNTL__FORCEON;



		OUTPLL(pllSCLK_MORE_CNTL, tmp);
@@ -497,7 +497,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo) 
	/* RV200::A11 A12, RV250::A11 A12 */

	if (((rinfo->family == CHIP_FAMILY_RV200) ||

	     (rinfo->family == CHIP_FAMILY_RV250)) &&

	    ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) {

	    ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) {

		tmp = INPLL(pllPLL_PWRMGT_CNTL);

		tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE;

		OUTPLL(pllPLL_PWRMGT_CNTL, tmp);
@@ -702,7 +702,7 @@ static void radeon_pm_restore_regs(struct radeonfb_info *rinfo) 
	OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]);

	OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]);

	OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]);

	OUTREG(CONFIG_MEMSIZE, rinfo->video_ram);

	OUTREG(CNFG_MEMSIZE, rinfo->video_ram);



	OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]);

	OUTREG(DISP_PWR_MAN, rinfo->save_regs[10]);
@@ -1723,7 +1723,7 @@ static void radeon_reinitialize_M10(struct radeonfb_info *rinfo) 
	OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]);

	OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]);

	OUTREG(OV0_BASE_ADDR, rinfo->save_regs[80]);

	OUTREG(CONFIG_MEMSIZE, rinfo->video_ram);

	OUTREG(CNFG_MEMSIZE, rinfo->video_ram);

	OUTREG(BUS_CNTL, rinfo->save_regs[36]);

	OUTREG(BUS_CNTL1, rinfo->save_regs[14]);

	OUTREG(MPP_TB_CONFIG, rinfo->save_regs[37]);
@@ -1961,7 +1961,7 @@ static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo) 
	OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, rinfo->save_regs[68] /*0x141555ff*/);

	OUTMC(rinfo, ixMC_IMP_CNTL_0, rinfo->save_regs[71] /*0x00009249*/);

	OUTREG(MC_IND_INDEX, 0);

	OUTREG(CONFIG_MEMSIZE, rinfo->video_ram);

	OUTREG(CNFG_MEMSIZE, rinfo->video_ram);



	mdelay(20);

}
@@ -2361,7 +2361,7 @@ static void radeon_reinitialize_QW(struct radeonfb_info *rinfo) 
	OUTMC(rinfo, ixMC_IMP_CNTL_0, 0x00009249);

	OUTREG(MC_IND_INDEX, 0);



	OUTREG(CONFIG_MEMSIZE, rinfo->video_ram);

	OUTREG(CNFG_MEMSIZE, rinfo->video_ram);



	radeon_pm_full_reset_sdram(rinfo);

include/video/aty128.h

+2 −2
Original line number Diff line number Diff line
@@ -21,9 +21,9 @@ 
#define I2C_CNTL_1				0x0094

#define PALETTE_INDEX				0x00b0

#define PALETTE_DATA				0x00b4

#define CONFIG_CNTL				0x00e0

#define CNFG_CNTL				0x00e0

#define GEN_RESET_CNTL				0x00f0

#define CONFIG_MEMSIZE				0x00f8

#define CNFG_MEMSIZE				0x00f8

#define MEM_CNTL				0x0140

#define MEM_POWER_MISC				0x015c

#define AGP_BASE				0x0170