Loading Documentation/devicetree/bindings/pci/msm_pcie.txt +8 −8 Original line number Diff line number Diff line Loading @@ -3,9 +3,9 @@ MSM PCIe MSM PCI express root complex Required properties: - compatible: should be "qcom,msm-pcie" - compatible: should be "qti,msm-pcie" - cell-index: defines root complex ID. - qcom,ctrl-amt: Number of controllers. - qti,ctrl-amt: Number of controllers. - #address-cells: Should provide a value of 0. - reg: should contain PCIe register maps. - reg-names: indicates various resources passed to driver by name. Loading Loading @@ -36,7 +36,7 @@ Required properties: vreg-0.9-supply: phandle to the analog supply for the PCIe controller. Optional Properties: - qcom,<supply-name>-voltage-level: specifies voltage levels for supply. - qti,<supply-name>-voltage-level: specifies voltage levels for supply. Should be specified in pairs (max, min, optimal), units uV. - clock-names: list of names of clock inputs. Should be "pcie_0_pipe_clk", "pcie_0_ref_clk_src", Loading @@ -48,10 +48,10 @@ Optional Properties: Example: pcie0: qcom,pcie@fc520000 { compatible = "qcom,msm_pcie"; pcie0: qti,pcie@fc520000 { compatible = "qti,msm_pcie"; cell-index = <0>; qcom,ctrl-amt = <1>; qti,ctrl-amt = <1>; #address-cells = <0>; reg = <0xfc520000 0x2000>, <0xfc526000 0x1000>, Loading Loading @@ -92,8 +92,8 @@ Example: vreg-0.9-supply = <&pma8084_l4>; vreg-3.3-supply = <&wlan_vreg>; qcom,vreg-1.8-voltage-level = <1800000 1800000 1000>; qcom,vreg-0.9-voltage-level = <950000 950000 24000>; qti,vreg-1.8-voltage-level = <1800000 1800000 1000>; qti,vreg-0.9-voltage-level = <950000 950000 24000>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", Loading arch/arm/boot/dts/qti/apq8084.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -379,10 +379,10 @@ qcom,pipe-attr-ee; }; pcie0: qcom,pcie@fc520000 { compatible = "qcom,msm_pcie"; pcie0: qti,pcie@fc520000 { compatible = "qti,msm_pcie"; cell-index = <0>; qcom,ctrl-amt = <1>; qti,ctrl-amt = <1>; reg = <0xfc520000 0x2000>, <0xfc526000 0x1000>, Loading arch/arm/boot/dts/qti/msmkrypton.dtsi +5 −5 Original line number Diff line number Diff line Loading @@ -177,10 +177,10 @@ interrupts = <0 94 0>; }; pcie0: qcom,pcie@fc520000 { compatible = "qcom,msm_pcie"; pcie0: qti,pcie@fc520000 { compatible = "qti,msm_pcie"; cell-index = <0>; qcom,ctrl-amt = <1>; qti,ctrl-amt = <1>; reg = <0xfc520000 0x2000>, <0xfc526000 0x1000>, Loading Loading @@ -223,8 +223,8 @@ vreg-1.8-supply = <&pmd9635_l8>; vreg-0.9-supply = <&pmd9635_l4>; qcom,vreg-1.8-voltage-level = <1800000 1800000 1000>; qcom,vreg-0.9-voltage-level = <950000 950000 24000>; qti,vreg-1.8-voltage-level = <1800000 1800000 1000>; qti,vreg-0.9-voltage-level = <950000 950000 24000>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", Loading arch/arm/mach-msm/board-8084.c +2 −2 Original line number Diff line number Diff line Loading @@ -66,8 +66,8 @@ static struct of_dev_auxdata apq8084_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qca,qca1530", 0x00000000, "qca1530.1", NULL), OF_DEV_AUXDATA("qcom,ufshc", 0xFC594000, "msm_ufs.1", NULL), OF_DEV_AUXDATA("qcom,xhci-msm-hsic", 0xf9c00000, "msm_hsic_host", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), OF_DEV_AUXDATA("qti,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qti,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), {} }; Loading arch/arm/mach-msm/board-krypton.c +1 −1 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ static struct reserve_info msmkrypton_reserve_info __initdata = { static struct of_dev_auxdata msmkrypton_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie", NULL), OF_DEV_AUXDATA("qti,msm_pcie", 0xFC520000, "msm_pcie", NULL), {} }; Loading Loading
Documentation/devicetree/bindings/pci/msm_pcie.txt +8 −8 Original line number Diff line number Diff line Loading @@ -3,9 +3,9 @@ MSM PCIe MSM PCI express root complex Required properties: - compatible: should be "qcom,msm-pcie" - compatible: should be "qti,msm-pcie" - cell-index: defines root complex ID. - qcom,ctrl-amt: Number of controllers. - qti,ctrl-amt: Number of controllers. - #address-cells: Should provide a value of 0. - reg: should contain PCIe register maps. - reg-names: indicates various resources passed to driver by name. Loading Loading @@ -36,7 +36,7 @@ Required properties: vreg-0.9-supply: phandle to the analog supply for the PCIe controller. Optional Properties: - qcom,<supply-name>-voltage-level: specifies voltage levels for supply. - qti,<supply-name>-voltage-level: specifies voltage levels for supply. Should be specified in pairs (max, min, optimal), units uV. - clock-names: list of names of clock inputs. Should be "pcie_0_pipe_clk", "pcie_0_ref_clk_src", Loading @@ -48,10 +48,10 @@ Optional Properties: Example: pcie0: qcom,pcie@fc520000 { compatible = "qcom,msm_pcie"; pcie0: qti,pcie@fc520000 { compatible = "qti,msm_pcie"; cell-index = <0>; qcom,ctrl-amt = <1>; qti,ctrl-amt = <1>; #address-cells = <0>; reg = <0xfc520000 0x2000>, <0xfc526000 0x1000>, Loading Loading @@ -92,8 +92,8 @@ Example: vreg-0.9-supply = <&pma8084_l4>; vreg-3.3-supply = <&wlan_vreg>; qcom,vreg-1.8-voltage-level = <1800000 1800000 1000>; qcom,vreg-0.9-voltage-level = <950000 950000 24000>; qti,vreg-1.8-voltage-level = <1800000 1800000 1000>; qti,vreg-0.9-voltage-level = <950000 950000 24000>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", Loading
arch/arm/boot/dts/qti/apq8084.dtsi +3 −3 Original line number Diff line number Diff line Loading @@ -379,10 +379,10 @@ qcom,pipe-attr-ee; }; pcie0: qcom,pcie@fc520000 { compatible = "qcom,msm_pcie"; pcie0: qti,pcie@fc520000 { compatible = "qti,msm_pcie"; cell-index = <0>; qcom,ctrl-amt = <1>; qti,ctrl-amt = <1>; reg = <0xfc520000 0x2000>, <0xfc526000 0x1000>, Loading
arch/arm/boot/dts/qti/msmkrypton.dtsi +5 −5 Original line number Diff line number Diff line Loading @@ -177,10 +177,10 @@ interrupts = <0 94 0>; }; pcie0: qcom,pcie@fc520000 { compatible = "qcom,msm_pcie"; pcie0: qti,pcie@fc520000 { compatible = "qti,msm_pcie"; cell-index = <0>; qcom,ctrl-amt = <1>; qti,ctrl-amt = <1>; reg = <0xfc520000 0x2000>, <0xfc526000 0x1000>, Loading Loading @@ -223,8 +223,8 @@ vreg-1.8-supply = <&pmd9635_l8>; vreg-0.9-supply = <&pmd9635_l4>; qcom,vreg-1.8-voltage-level = <1800000 1800000 1000>; qcom,vreg-0.9-voltage-level = <950000 950000 24000>; qti,vreg-1.8-voltage-level = <1800000 1800000 1000>; qti,vreg-0.9-voltage-level = <950000 950000 24000>; clock-names = "pcie_0_pipe_clk", "pcie_0_ref_clk_src", "pcie_0_aux_clk", "pcie_0_cfg_ahb_clk", Loading
arch/arm/mach-msm/board-8084.c +2 −2 Original line number Diff line number Diff line Loading @@ -66,8 +66,8 @@ static struct of_dev_auxdata apq8084_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qca,qca1530", 0x00000000, "qca1530.1", NULL), OF_DEV_AUXDATA("qcom,ufshc", 0xFC594000, "msm_ufs.1", NULL), OF_DEV_AUXDATA("qcom,xhci-msm-hsic", 0xf9c00000, "msm_hsic_host", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), OF_DEV_AUXDATA("qti,msm_pcie", 0xFC520000, "msm_pcie.1", NULL), OF_DEV_AUXDATA("qti,msm_pcie", 0xFC528000, "msm_pcie.2", NULL), {} }; Loading
arch/arm/mach-msm/board-krypton.c +1 −1 Original line number Diff line number Diff line Loading @@ -54,7 +54,7 @@ static struct reserve_info msmkrypton_reserve_info __initdata = { static struct of_dev_auxdata msmkrypton_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("qcom,sdhci-msm", 0xF98A4900, "msm_sdcc.2", NULL), OF_DEV_AUXDATA("qcom,msm_pcie", 0xFC520000, "msm_pcie", NULL), OF_DEV_AUXDATA("qti,msm_pcie", 0xFC520000, "msm_pcie", NULL), {} }; Loading