Loading arch/arm/boot/dts/qcom/msmplutonium.dtsi +15 −0 Original line number Diff line number Diff line Loading @@ -161,6 +161,21 @@ clock-names = "dfab_clk", "dma_bam_pclk"; }; ipa_hw: qcom,ipa@fd4c0000 { compatible = "qcom,ipa"; reg = <0xfd4c0000 0x29000>, <0xfd4c4000 0x15820>; reg-names = "ipa-base", "bam-base"; interrupts = <0 302 0>, <0 303 0>; interrupt-names = "ipa-irq", "bam-irq"; qcom,ipa-hw-ver = <3>; /* IPA core version = IPAv2.0 */ qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */ qcom,ee = <0>; clock-names = "core_clk"; clocks = <&clock_rpm clk_ipa_clk>; }; qcom,ipc-spinlock@fd484000 { compatible = "qcom,ipc-spinlock-sfpb"; reg = <0xfd484000 0x400>; Loading Loading
arch/arm/boot/dts/qcom/msmplutonium.dtsi +15 −0 Original line number Diff line number Diff line Loading @@ -161,6 +161,21 @@ clock-names = "dfab_clk", "dma_bam_pclk"; }; ipa_hw: qcom,ipa@fd4c0000 { compatible = "qcom,ipa"; reg = <0xfd4c0000 0x29000>, <0xfd4c4000 0x15820>; reg-names = "ipa-base", "bam-base"; interrupts = <0 302 0>, <0 303 0>; interrupt-names = "ipa-irq", "bam-irq"; qcom,ipa-hw-ver = <3>; /* IPA core version = IPAv2.0 */ qcom,ipa-hw-mode = <0>; /* IPA hw type = Normal */ qcom,ee = <0>; clock-names = "core_clk"; clocks = <&clock_rpm clk_ipa_clk>; }; qcom,ipc-spinlock@fd484000 { compatible = "qcom,ipc-spinlock-sfpb"; reg = <0xfd484000 0x400>; Loading