Loading drivers/video/msm/mdss/mdss_mdp_pp.c +41 −13 Original line number Original line Diff line number Diff line Loading @@ -221,6 +221,7 @@ static u32 igc_limited[IGC_LUT_ENTRIES] = { #define PP_AD_STS_DIRTY_CFG 0x4 #define PP_AD_STS_DIRTY_CFG 0x4 #define PP_AD_STS_DIRTY_DATA 0x8 #define PP_AD_STS_DIRTY_DATA 0x8 #define PP_AD_STS_DIRTY_VSYNC 0x10 #define PP_AD_STS_DIRTY_VSYNC 0x10 #define PP_AD_STS_DIRTY_ENABLE 0x20 #define PP_AD_STS_IS_DIRTY(sts) (((sts) & PP_AD_STS_DIRTY_INIT) ||\ #define PP_AD_STS_IS_DIRTY(sts) (((sts) & PP_AD_STS_DIRTY_INIT) ||\ ((sts) & PP_AD_STS_DIRTY_CFG)) ((sts) & PP_AD_STS_DIRTY_CFG)) Loading Loading @@ -1425,12 +1426,9 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer) mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id); mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id); if (dspp_num < mdata->nad_cfgs && (mixer_cnt != 2)) { if (dspp_num < mdata->nad_cfgs && (mixer_cnt != 2)) { ret = mdss_mdp_ad_setup(ctl->mfd); ad = &mdata->ad_cfgs[disp_num]; ad = &mdata->ad_cfgs[disp_num]; ad_flags = ad->reg_sts; ad_flags = ad->reg_sts; ad_hw = &mdata->ad_off[dspp_num]; ad_hw = &mdata->ad_off[dspp_num]; if (ret < 0) pr_warn("ad_setup(dspp%d) returns %d", dspp_num, ret); } else { } else { ad_flags = 0; ad_flags = 0; } } Loading @@ -1440,9 +1438,8 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer) goto flush_exit; goto flush_exit; /* nothing to update */ /* nothing to update */ if ((!flags) && (!(opmode)) && (ret <= 0) && (!ad_flags)) if ((!flags) && (!(opmode)) && (!ad_flags)) goto dspp_exit; goto dspp_exit; ret = 0; pp_sts = &mdss_pp_res->pp_disp_sts[disp_num]; pp_sts = &mdss_pp_res->pp_disp_sts[disp_num]; Loading Loading @@ -1547,13 +1544,36 @@ error: int mdss_mdp_pp_setup_locked(struct mdss_mdp_ctl *ctl) int mdss_mdp_pp_setup_locked(struct mdss_mdp_ctl *ctl) { { struct mdss_data_type *mdata = ctl->mdata; struct mdss_data_type *mdata = ctl->mdata; int ret = 0; u32 mixer_cnt; u32 mixer_id[MDSS_MDP_INTF_MAX_LAYERMIXER]; u32 disp_num; u32 disp_num; int i; bool valid_mixers = true; if ((!ctl->mfd) || (!mdss_pp_res)) if ((!ctl->mfd) || (!mdss_pp_res)) return -EINVAL; return -EINVAL; /* treat fb_num the same as block logical id*/ /* treat fb_num the same as block logical id*/ disp_num = ctl->mfd->index; disp_num = ctl->mfd->index; mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id); if (!mixer_cnt) { valid_mixers = false; ret = -EINVAL; pr_warn("Configuring post processing without mixers, err = %d", ret); goto exit; } for (i = 0; i < mixer_cnt && valid_mixers; i++) { if (mixer_id[i] > mdata->nad_cfgs) valid_mixers = false; } if (valid_mixers && (mixer_cnt != 2)) { ret = mdss_mdp_ad_setup(ctl->mfd); if (ret < 0) pr_warn("ad_setup(disp%d) returns %d", disp_num, ret); } mutex_lock(&mdss_pp_mutex); mutex_lock(&mdss_pp_mutex); if (ctl->mixer_left) { if (ctl->mixer_left) { pp_mixer_setup(disp_num, ctl->mixer_left); pp_mixer_setup(disp_num, ctl->mixer_left); Loading @@ -1570,8 +1590,8 @@ int mdss_mdp_pp_setup_locked(struct mdss_mdp_ctl *ctl) mdata->ad_cfgs[disp_num].reg_sts = 0; mdata->ad_cfgs[disp_num].reg_sts = 0; } } mutex_unlock(&mdss_pp_mutex); mutex_unlock(&mdss_pp_mutex); exit: return 0; return ret; } } /* /* Loading Loading @@ -3718,12 +3738,19 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) u32 bypass = MDSS_PP_AD_BYPASS_DEF, bl; u32 bypass = MDSS_PP_AD_BYPASS_DEF, bl; ret = mdss_mdp_get_ad(mfd, &ad); ret = mdss_mdp_get_ad(mfd, &ad); if (ret) if (ret) { return ret; ret = -EINVAL; pr_debug("failed to get ad_info, err = %d", ret); goto exit; } if (mfd->panel_info->type == WRITEBACK_PANEL) { if (mfd->panel_info->type == WRITEBACK_PANEL) { bl_mfd = mdss_get_mfd_from_index(0); bl_mfd = mdss_get_mfd_from_index(0); if (!bl_mfd) if (!bl_mfd) { return ret; ret = -EINVAL; pr_warn("failed to get primary FB bl handle, err = %d", ret); goto exit; } } else { } else { bl_mfd = mfd; bl_mfd = mfd; } } Loading Loading @@ -3797,7 +3824,7 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) if ((ad->sts & PP_STS_ENABLE) && PP_AD_STATE_IS_READY(ad->state)) { if ((ad->sts & PP_STS_ENABLE) && PP_AD_STATE_IS_READY(ad->state)) { bypass = 0; bypass = 0; ret = 1; ad->reg_sts |= PP_AD_STS_DIRTY_ENABLE; ad->state |= PP_AD_STATE_RUN; ad->state |= PP_AD_STATE_RUN; mutex_lock(&bl_mfd->bl_lock); mutex_lock(&bl_mfd->bl_lock); if (bl_mfd != mfd) if (bl_mfd != mfd) Loading @@ -3808,7 +3835,7 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) } else { } else { if (ad->state & PP_AD_STATE_RUN) { if (ad->state & PP_AD_STATE_RUN) { ret = 1; ad->reg_sts = PP_AD_STS_DIRTY_ENABLE; /* Clear state and regs when going to off state*/ /* Clear state and regs when going to off state*/ ad->sts = 0; ad->sts = 0; ad->sts |= PP_AD_STS_DIRTY_VSYNC; ad->sts |= PP_AD_STS_DIRTY_VSYNC; Loading Loading @@ -3861,6 +3888,7 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) ad->state); ad->state); } } mutex_unlock(&ad->lock); mutex_unlock(&ad->lock); exit: return ret; return ret; } } Loading Loading
drivers/video/msm/mdss/mdss_mdp_pp.c +41 −13 Original line number Original line Diff line number Diff line Loading @@ -221,6 +221,7 @@ static u32 igc_limited[IGC_LUT_ENTRIES] = { #define PP_AD_STS_DIRTY_CFG 0x4 #define PP_AD_STS_DIRTY_CFG 0x4 #define PP_AD_STS_DIRTY_DATA 0x8 #define PP_AD_STS_DIRTY_DATA 0x8 #define PP_AD_STS_DIRTY_VSYNC 0x10 #define PP_AD_STS_DIRTY_VSYNC 0x10 #define PP_AD_STS_DIRTY_ENABLE 0x20 #define PP_AD_STS_IS_DIRTY(sts) (((sts) & PP_AD_STS_DIRTY_INIT) ||\ #define PP_AD_STS_IS_DIRTY(sts) (((sts) & PP_AD_STS_DIRTY_INIT) ||\ ((sts) & PP_AD_STS_DIRTY_CFG)) ((sts) & PP_AD_STS_DIRTY_CFG)) Loading Loading @@ -1425,12 +1426,9 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer) mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id); mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id); if (dspp_num < mdata->nad_cfgs && (mixer_cnt != 2)) { if (dspp_num < mdata->nad_cfgs && (mixer_cnt != 2)) { ret = mdss_mdp_ad_setup(ctl->mfd); ad = &mdata->ad_cfgs[disp_num]; ad = &mdata->ad_cfgs[disp_num]; ad_flags = ad->reg_sts; ad_flags = ad->reg_sts; ad_hw = &mdata->ad_off[dspp_num]; ad_hw = &mdata->ad_off[dspp_num]; if (ret < 0) pr_warn("ad_setup(dspp%d) returns %d", dspp_num, ret); } else { } else { ad_flags = 0; ad_flags = 0; } } Loading @@ -1440,9 +1438,8 @@ static int pp_dspp_setup(u32 disp_num, struct mdss_mdp_mixer *mixer) goto flush_exit; goto flush_exit; /* nothing to update */ /* nothing to update */ if ((!flags) && (!(opmode)) && (ret <= 0) && (!ad_flags)) if ((!flags) && (!(opmode)) && (!ad_flags)) goto dspp_exit; goto dspp_exit; ret = 0; pp_sts = &mdss_pp_res->pp_disp_sts[disp_num]; pp_sts = &mdss_pp_res->pp_disp_sts[disp_num]; Loading Loading @@ -1547,13 +1544,36 @@ error: int mdss_mdp_pp_setup_locked(struct mdss_mdp_ctl *ctl) int mdss_mdp_pp_setup_locked(struct mdss_mdp_ctl *ctl) { { struct mdss_data_type *mdata = ctl->mdata; struct mdss_data_type *mdata = ctl->mdata; int ret = 0; u32 mixer_cnt; u32 mixer_id[MDSS_MDP_INTF_MAX_LAYERMIXER]; u32 disp_num; u32 disp_num; int i; bool valid_mixers = true; if ((!ctl->mfd) || (!mdss_pp_res)) if ((!ctl->mfd) || (!mdss_pp_res)) return -EINVAL; return -EINVAL; /* treat fb_num the same as block logical id*/ /* treat fb_num the same as block logical id*/ disp_num = ctl->mfd->index; disp_num = ctl->mfd->index; mixer_cnt = mdss_mdp_get_ctl_mixers(disp_num, mixer_id); if (!mixer_cnt) { valid_mixers = false; ret = -EINVAL; pr_warn("Configuring post processing without mixers, err = %d", ret); goto exit; } for (i = 0; i < mixer_cnt && valid_mixers; i++) { if (mixer_id[i] > mdata->nad_cfgs) valid_mixers = false; } if (valid_mixers && (mixer_cnt != 2)) { ret = mdss_mdp_ad_setup(ctl->mfd); if (ret < 0) pr_warn("ad_setup(disp%d) returns %d", disp_num, ret); } mutex_lock(&mdss_pp_mutex); mutex_lock(&mdss_pp_mutex); if (ctl->mixer_left) { if (ctl->mixer_left) { pp_mixer_setup(disp_num, ctl->mixer_left); pp_mixer_setup(disp_num, ctl->mixer_left); Loading @@ -1570,8 +1590,8 @@ int mdss_mdp_pp_setup_locked(struct mdss_mdp_ctl *ctl) mdata->ad_cfgs[disp_num].reg_sts = 0; mdata->ad_cfgs[disp_num].reg_sts = 0; } } mutex_unlock(&mdss_pp_mutex); mutex_unlock(&mdss_pp_mutex); exit: return 0; return ret; } } /* /* Loading Loading @@ -3718,12 +3738,19 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) u32 bypass = MDSS_PP_AD_BYPASS_DEF, bl; u32 bypass = MDSS_PP_AD_BYPASS_DEF, bl; ret = mdss_mdp_get_ad(mfd, &ad); ret = mdss_mdp_get_ad(mfd, &ad); if (ret) if (ret) { return ret; ret = -EINVAL; pr_debug("failed to get ad_info, err = %d", ret); goto exit; } if (mfd->panel_info->type == WRITEBACK_PANEL) { if (mfd->panel_info->type == WRITEBACK_PANEL) { bl_mfd = mdss_get_mfd_from_index(0); bl_mfd = mdss_get_mfd_from_index(0); if (!bl_mfd) if (!bl_mfd) { return ret; ret = -EINVAL; pr_warn("failed to get primary FB bl handle, err = %d", ret); goto exit; } } else { } else { bl_mfd = mfd; bl_mfd = mfd; } } Loading Loading @@ -3797,7 +3824,7 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) if ((ad->sts & PP_STS_ENABLE) && PP_AD_STATE_IS_READY(ad->state)) { if ((ad->sts & PP_STS_ENABLE) && PP_AD_STATE_IS_READY(ad->state)) { bypass = 0; bypass = 0; ret = 1; ad->reg_sts |= PP_AD_STS_DIRTY_ENABLE; ad->state |= PP_AD_STATE_RUN; ad->state |= PP_AD_STATE_RUN; mutex_lock(&bl_mfd->bl_lock); mutex_lock(&bl_mfd->bl_lock); if (bl_mfd != mfd) if (bl_mfd != mfd) Loading @@ -3808,7 +3835,7 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) } else { } else { if (ad->state & PP_AD_STATE_RUN) { if (ad->state & PP_AD_STATE_RUN) { ret = 1; ad->reg_sts = PP_AD_STS_DIRTY_ENABLE; /* Clear state and regs when going to off state*/ /* Clear state and regs when going to off state*/ ad->sts = 0; ad->sts = 0; ad->sts |= PP_AD_STS_DIRTY_VSYNC; ad->sts |= PP_AD_STS_DIRTY_VSYNC; Loading Loading @@ -3861,6 +3888,7 @@ static int mdss_mdp_ad_setup(struct msm_fb_data_type *mfd) ad->state); ad->state); } } mutex_unlock(&ad->lock); mutex_unlock(&ad->lock); exit: return ret; return ret; } } Loading