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Commit ddbe3777 authored by Punit Soni's avatar Punit Soni
Browse files

msm: camera: enable VFE 4.4 on APQ8084



- Enable the new BF scale stats by correctly programming the
  enable bits. Add the checking to make sure when BF scale
  is enabled (in composite IRQ), BF needs to be enabled too.

- The num_rows field in the image master WR_BUFFER_CFG has increased by
  2 bits and now the 2 MSB bit are programmed in the lower reserved
  bits. The violation status bit meaning is also altered.
  The CGC override registers now have newer bits to enable for
  BPC, LTM and ABF. VBIF and QOS settings are updated.

Change-Id: I815df6615a89f59dc477fe6afdef2b0bcf3b6170
Signed-off-by: default avatarPunit Soni <punits@codeaurora.org>
parent 6917c867
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+5 −0
Original line number Original line Diff line number Diff line
@@ -28,12 +28,17 @@
#include "msm_isp_axi_util.h"
#include "msm_isp_axi_util.h"
#include "msm_isp_stats_util.h"
#include "msm_isp_stats_util.h"
#include "msm_sd.h"
#include "msm_sd.h"
#include "msm_isp44.h"
#include "msm_isp40.h"
#include "msm_isp40.h"
#include "msm_isp32.h"
#include "msm_isp32.h"


static struct msm_sd_req_vb2_q vfe_vb2_ops;
static struct msm_sd_req_vb2_q vfe_vb2_ops;


static const struct of_device_id msm_vfe_dt_match[] = {
static const struct of_device_id msm_vfe_dt_match[] = {
	{
		.compatible = "qcom,vfe44",
		.data = &vfe44_hw_info,
	},
	{
	{
		.compatible = "qcom,vfe40",
		.compatible = "qcom,vfe40",
		.data = &vfe40_hw_info,
		.data = &vfe40_hw_info,
+1 −0
Original line number Original line Diff line number Diff line
@@ -157,6 +157,7 @@ struct msm_vfe_core_ops {
};
};
struct msm_vfe_stats_ops {
struct msm_vfe_stats_ops {
	int (*get_stats_idx) (enum msm_isp_stats_type stats_type);
	int (*get_stats_idx) (enum msm_isp_stats_type stats_type);
	int (*check_streams) (struct msm_vfe_stats_stream *stream_info);
	void (*cfg_framedrop) (struct vfe_device *vfe_dev,
	void (*cfg_framedrop) (struct vfe_device *vfe_dev,
		struct msm_vfe_stats_stream *stream_info);
		struct msm_vfe_stats_stream *stream_info);
	void (*clear_framedrop) (struct vfe_device *vfe_dev,
	void (*clear_framedrop) (struct vfe_device *vfe_dev,
+7 −0
Original line number Original line Diff line number Diff line
@@ -860,6 +860,12 @@ static int msm_vfe32_get_stats_idx(enum msm_isp_stats_type stats_type)
	}
	}
}
}


static int msm_vfe32_stats_check_streams(
	struct msm_vfe_stats_stream *stream_info)
{
	return 0;
}

static void msm_vfe32_stats_cfg_comp_mask(struct vfe_device *vfe_dev,
static void msm_vfe32_stats_cfg_comp_mask(struct vfe_device *vfe_dev,
	uint32_t stats_mask, uint8_t enable)
	uint32_t stats_mask, uint8_t enable)
{
{
@@ -1130,6 +1136,7 @@ struct msm_vfe_hardware_info vfe32_hw_info = {
		},
		},
		.stats_ops = {
		.stats_ops = {
			.get_stats_idx = msm_vfe32_get_stats_idx,
			.get_stats_idx = msm_vfe32_get_stats_idx,
			.check_streams = msm_vfe32_stats_check_streams,
			.cfg_comp_mask = msm_vfe32_stats_cfg_comp_mask,
			.cfg_comp_mask = msm_vfe32_stats_cfg_comp_mask,
			.cfg_wm_irq_mask = msm_vfe32_stats_cfg_wm_irq_mask,
			.cfg_wm_irq_mask = msm_vfe32_stats_cfg_wm_irq_mask,
			.clear_wm_irq_mask = msm_vfe32_stats_clear_wm_irq_mask,
			.clear_wm_irq_mask = msm_vfe32_stats_clear_wm_irq_mask,
+7 −0
Original line number Original line Diff line number Diff line
@@ -1155,6 +1155,12 @@ static int msm_vfe40_get_stats_idx(enum msm_isp_stats_type stats_type)
	}
	}
}
}


static int msm_vfe40_stats_check_streams(
	struct msm_vfe_stats_stream *stream_info)
{
	return 0;
}

static void msm_vfe40_stats_cfg_comp_mask(struct vfe_device *vfe_dev,
static void msm_vfe40_stats_cfg_comp_mask(struct vfe_device *vfe_dev,
	uint32_t stats_mask, uint8_t enable)
	uint32_t stats_mask, uint8_t enable)
{
{
@@ -1458,6 +1464,7 @@ struct msm_vfe_hardware_info vfe40_hw_info = {
		},
		},
		.stats_ops = {
		.stats_ops = {
			.get_stats_idx = msm_vfe40_get_stats_idx,
			.get_stats_idx = msm_vfe40_get_stats_idx,
			.check_streams = msm_vfe40_stats_check_streams,
			.cfg_comp_mask = msm_vfe40_stats_cfg_comp_mask,
			.cfg_comp_mask = msm_vfe40_stats_cfg_comp_mask,
			.cfg_wm_irq_mask = msm_vfe40_stats_cfg_wm_irq_mask,
			.cfg_wm_irq_mask = msm_vfe40_stats_cfg_wm_irq_mask,
			.clear_wm_irq_mask = msm_vfe40_stats_clear_wm_irq_mask,
			.clear_wm_irq_mask = msm_vfe40_stats_clear_wm_irq_mask,
+148 −214

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