Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b43a7ffb authored by Viresh Kumar's avatar Viresh Kumar Committed by Rafael J. Wysocki
Browse files

cpufreq: Notify all policy->cpus in cpufreq_notify_transition() 



policy->cpus contains all online cpus that have single shared clock line. And
their frequencies are always updated together.

Many SMP system's cpufreq drivers take care of this in individual drivers but
the best place for this code is in cpufreq core.

This patch modifies cpufreq_notify_transition() to notify frequency change for
all cpus in policy->cpus and hence updates all users of this API.

Signed-off-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Acked-by: default avatarStephen Warren <swarren@nvidia.com>
Tested-by: default avatarStephen Warren <swarren@nvidia.com>
Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
parent fd143b4d

arch/arm/mach-davinci/cpufreq.c

+2 −3
Original line number Diff line number Diff line
@@ -90,7 +90,6 @@ static int davinci_target(struct cpufreq_policy *policy, 


	freqs.old = davinci_getspeed(0);

	freqs.new = clk_round_rate(armclk, target_freq * 1000) / 1000;

	freqs.cpu = 0;



	if (freqs.old == freqs.new)

		return ret;
@@ -102,7 +101,7 @@ static int davinci_target(struct cpufreq_policy *policy, 
	if (ret)

		return -EINVAL;



	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);



	/* if moving to higher frequency, up the voltage beforehand */

	if (pdata->set_voltage && freqs.new > freqs.old) {
@@ -126,7 +125,7 @@ static int davinci_target(struct cpufreq_policy *policy, 
		pdata->set_voltage(idx);



out:

	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);



	return ret;

}

arch/arm/mach-imx/cpufreq.c

+2 −3
Original line number Diff line number Diff line
@@ -87,13 +87,12 @@ static int mxc_set_target(struct cpufreq_policy *policy, 


	freqs.old = clk_get_rate(cpu_clk) / 1000;

	freqs.new = freq_Hz / 1000;

	freqs.cpu = 0;

	freqs.flags = 0;

	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);



	ret = set_cpu_freq(freq_Hz);



	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);



	return ret;

}

arch/arm/mach-integrator/cpu.c

+2 −4
Original line number Diff line number Diff line
@@ -123,14 +123,12 @@ static int integrator_set_target(struct cpufreq_policy *policy, 
	vco = icst_hz_to_vco(&cclk_params, target_freq * 1000);

	freqs.new = icst_hz(&cclk_params, vco) / 1000;



	freqs.cpu = policy->cpu;



	if (freqs.old == freqs.new) {

		set_cpus_allowed(current, cpus_allowed);

		return 0;

	}



	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);



	cm_osc = __raw_readl(CM_OSC);
@@ -151,7 +149,7 @@ static int integrator_set_target(struct cpufreq_policy *policy, 
	 */

	set_cpus_allowed(current, cpus_allowed);



	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);



	return 0;

}

arch/arm/mach-pxa/cpufreq-pxa2xx.c

+2 −3
Original line number Diff line number Diff line
@@ -311,7 +311,6 @@ static int pxa_set_target(struct cpufreq_policy *policy, 
	new_freq_mem = pxa_freq_settings[idx].membus;

	freqs.old = policy->cur;

	freqs.new = new_freq_cpu;

	freqs.cpu = policy->cpu;



	if (freq_debug)

		pr_debug("Changing CPU frequency to %d Mhz, (SDRAM %d Mhz)\n",
@@ -327,7 +326,7 @@ static int pxa_set_target(struct cpufreq_policy *policy, 
	 * you should add a notify client with any platform specific

	 * Vcc changing capability

	 */

	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);



	/* Calculate the next MDREFR.  If we're slowing down the SDRAM clock

	 * we need to preset the smaller DRI before the change.	 If we're
@@ -382,7 +381,7 @@ static int pxa_set_target(struct cpufreq_policy *policy, 
	 * you should add a notify client with any platform specific

	 * SDRAM refresh timer adjustments

	 */

	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);



	/*

	 * Even if voltage setting fails, we don't report it, as the frequency

arch/arm/mach-pxa/cpufreq-pxa3xx.c

+2 −3
Original line number Diff line number Diff line
@@ -184,7 +184,6 @@ static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, 


	freqs.old = policy->cur;

	freqs.new = next->cpufreq_mhz * 1000;

	freqs.cpu = policy->cpu;



	pr_debug("CPU frequency from %d MHz to %d MHz%s\n",

			freqs.old / 1000, freqs.new / 1000,
@@ -193,14 +192,14 @@ static int pxa3xx_cpufreq_set(struct cpufreq_policy *policy, 
	if (freqs.old == target_freq)

		return 0;



	cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);



	local_irq_save(flags);

	__update_core_freq(next);

	__update_bus_freq(next);

	local_irq_restore(flags);



	cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);

	cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);



	return 0;

}