Loading Documentation/devicetree/bindings/pci/msm_pcie.txt +2 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,7 @@ Optional Properties: support L1ss. - qcom,msi-gicm-addr: MSI address for GICv2m. - qcom,msi-gicm-base: MSI IRQ base for GICv2m. - qcom,ext-ref-clk: The reference clock is external. Example: Loading Loading @@ -111,4 +112,5 @@ Example: qcom,aux-clk-sync; qcom,msi-gicm-addr = <0xf9040040>; qcom,msi-gicm-base = <0x160>; qcom,ext-ref-clk; }; arch/arm/mach-msm/pcie.c +6 −0 Original line number Diff line number Diff line Loading @@ -1241,6 +1241,12 @@ static int msm_pcie_probe(struct platform_device *pdev) PCIE_DBG("AUX clock is %s synchronous to Core clock.\n", msm_pcie_dev[rc_idx].aux_clk_sync ? "" : "not"); msm_pcie_dev[rc_idx].ext_ref_clk = of_property_read_bool((&pdev->dev)->of_node, "qcom,ext-ref-clk"); PCIE_DBG("ref clk is %s.\n", msm_pcie_dev[rc_idx].ext_ref_clk ? "external" : "internal"); msm_pcie_dev[rc_idx].msi_gicm_addr = 0; msm_pcie_dev[rc_idx].msi_gicm_base = 0; ret = of_property_read_u32((&pdev->dev)->of_node, Loading arch/arm/mach-msm/pcie.h +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -174,6 +174,7 @@ struct msm_pcie_dev_t { bool l1ss_supported; bool aux_clk_sync; bool ext_ref_clk; uint32_t rc_idx; bool enumerated; Loading Loading
Documentation/devicetree/bindings/pci/msm_pcie.txt +2 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,7 @@ Optional Properties: support L1ss. - qcom,msi-gicm-addr: MSI address for GICv2m. - qcom,msi-gicm-base: MSI IRQ base for GICv2m. - qcom,ext-ref-clk: The reference clock is external. Example: Loading Loading @@ -111,4 +112,5 @@ Example: qcom,aux-clk-sync; qcom,msi-gicm-addr = <0xf9040040>; qcom,msi-gicm-base = <0x160>; qcom,ext-ref-clk; };
arch/arm/mach-msm/pcie.c +6 −0 Original line number Diff line number Diff line Loading @@ -1241,6 +1241,12 @@ static int msm_pcie_probe(struct platform_device *pdev) PCIE_DBG("AUX clock is %s synchronous to Core clock.\n", msm_pcie_dev[rc_idx].aux_clk_sync ? "" : "not"); msm_pcie_dev[rc_idx].ext_ref_clk = of_property_read_bool((&pdev->dev)->of_node, "qcom,ext-ref-clk"); PCIE_DBG("ref clk is %s.\n", msm_pcie_dev[rc_idx].ext_ref_clk ? "external" : "internal"); msm_pcie_dev[rc_idx].msi_gicm_addr = 0; msm_pcie_dev[rc_idx].msi_gicm_base = 0; ret = of_property_read_u32((&pdev->dev)->of_node, Loading
arch/arm/mach-msm/pcie.h +2 −1 Original line number Diff line number Diff line /* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved. /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -174,6 +174,7 @@ struct msm_pcie_dev_t { bool l1ss_supported; bool aux_clk_sync; bool ext_ref_clk; uint32_t rc_idx; bool enumerated; Loading