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Commit 7cc353b5 authored by Ujwal Patel's avatar Ujwal Patel
Browse files

ARM: dts: msm: fix offset values of sw-reset and clk-ctrl MDP registers 



Starting with 57eccdad, base address of
certain registers within MDP driver is changed. Update offsets of
sw-reset and clk-ctrl registers to match this requirement.

Change-Id: I07767ac4eacab722a853d510bfc4db9a4a06ba83
Signed-off-by: default avatarUjwal Patel <ujwalp@codeaurora.org>
parent 8e5d905c

arch/arm/boot/dts/qcom/apq8084-mdss.dtsi

+11 −11
Original line number Diff line number Diff line
@@ -57,18 +57,18 @@ 
						<2 4 5>,

						<2 6 7>;



		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3AC 0 0>,

						      <0x3B4 0 0>,

						      <0x3BC 0 0>,

						      <0x3C4 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3AC 4 8>,

						      <0x3B4 4 8>,

						      <0x3BC 4 8>,

						      <0x3C4 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>,

						      <0x3B4 8 12>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2AC 0 0>,

						      <0x2B4 0 0>,

						      <0x2BC 0 0>,

						      <0x2C4 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2AC 4 8>,

						      <0x2B4 4 8>,

						      <0x2BC 4 8>,

						      <0x2C4 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2AC 8 12>,

						      <0x2B4 8 12>;



		qcom,mdss-pipe-sw-reset-off = <0x0128>;

		qcom,mdss-pipe-sw-reset-off = <0x0028>;

		qcom,mdss-pipe-vig-sw-reset-map = <5 6 7 8>;

		qcom,mdss-pipe-rgb-sw-reset-map = <9 10 11 12>;

		qcom,mdss-pipe-dma-sw-reset-map = <13 14>;

arch/arm/boot/dts/qcom/mpq8092-mdss.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -45,12 +45,12 @@ 
		qcom,mdss-pipe-vig-xin-id = <0 1 2 3>;

		qcom,mdss-pipe-rgb-xin-id = <4 5>;



		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3AC 0 0>,

						      <0x3B4 0 0>,

						      <0x3BC 0 0>,

						      <0x3BC 24 16>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3AC 4 8>,

						      <0x3B4 4 8>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2AC 0 0>,

						      <0x2B4 0 0>,

						      <0x2BC 0 0>,

						      <0x2BC 24 16>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2AC 4 8>,

						      <0x2B4 4 8>;



		qcom,mdss-ctl-off = <0x00000600 0x00000700>;

		qcom,mdss-mixer-intf-off = <0x00004a00 0x00004e00>;

arch/arm/boot/dts/qcom/msm8226-mdss.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -48,11 +48,11 @@ 
		qcom,mdss-pipe-rgb-xin-id = <1>;

		qcom,mdss-pipe-dma-xin-id = <2>;



		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3AC 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3AC 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2AC 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2AC 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2AC 8 12>;



		qcom,mdss-pipe-sw-reset-off = <0x01A8>;

		qcom,mdss-pipe-sw-reset-off = <0x00A8>;

		qcom,mdss-pipe-vig-sw-reset-map = <0>;

		qcom,mdss-pipe-rgb-sw-reset-map = <1>;

		qcom,mdss-pipe-dma-sw-reset-map = <2>;

arch/arm/boot/dts/qcom/msm8916-mdss.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -47,10 +47,10 @@ 
		qcom,mdss-pipe-vig-xin-id = <0>;

		qcom,mdss-pipe-rgb-xin-id = <1 5>;

		qcom,mdss-pipe-dma-xin-id = <2>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x12ac 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x12ac 4 8>,

						      <0x12b4 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x12ac 8 12>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2ac 4 8>,

						      <0x2b4 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 8 12>;



		qcom,mdss-smp-data = <8 8192>;

arch/arm/boot/dts/qcom/msm8974-mdss.dtsi

+8 −8
Original line number Diff line number Diff line
@@ -50,14 +50,14 @@ 
		qcom,mdss-pipe-rgb-xin-id = <1 5 9>;

		qcom,mdss-pipe-dma-xin-id = <2 10>;



		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3AC 0 0>,

						      <0x3B4 0 0>,

						      <0x3BC 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3AC 4 8>,

						      <0x3B4 4 8>,

						      <0x3BC 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3AC 8 12>,

						      <0x3B4 8 12>;

		qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2AC 0 0>,

						      <0x2B4 0 0>,

						      <0x2BC 0 0>;

		qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2AC 4 8>,

						      <0x2B4 4 8>,

						      <0x2BC 4 8>;

		qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2AC 8 12>,

						      <0x2B4 8 12>;



		qcom,mdss-smp-data = <22 4096>;