Loading arch/arm/boot/dts/qcom/msm8916-regulator.dtsi +15 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,19 @@ /* CPR controlled regulator */ &soc { mem_acc_vreg_corner: regulator@1946000 { compatible = "qcom,mem-acc-regulator"; reg = <0x1946000 0x4>, <0x1946000 0x4>; reg-names = "acc-sel-l1", "acc-sel-l2"; regulator-name = "mem_acc_corner"; regulator-min-microvolt = <1>; regulator-max-microvolt = <3>; qcom,acc-sel-l1-bit-pos = <0>; qcom,acc-sel-l2-bit-pos = <8>; qcom,corner-acc-map = <0 1 1>; }; apc_vreg_corner: regulator@b018000 { compatible = "qcom,cpr-regulator"; reg = <0xb018000 0x1000>, <0xb011064 4>, <0x58000 0x1000>; Loading @@ -45,6 +58,8 @@ vdd-mx-supply = <&pm8916_l3>; qcom,vdd-mx-vmax = <1287500>; mem-acc-supply = <&mem_acc_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; Loading Loading
arch/arm/boot/dts/qcom/msm8916-regulator.dtsi +15 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,19 @@ /* CPR controlled regulator */ &soc { mem_acc_vreg_corner: regulator@1946000 { compatible = "qcom,mem-acc-regulator"; reg = <0x1946000 0x4>, <0x1946000 0x4>; reg-names = "acc-sel-l1", "acc-sel-l2"; regulator-name = "mem_acc_corner"; regulator-min-microvolt = <1>; regulator-max-microvolt = <3>; qcom,acc-sel-l1-bit-pos = <0>; qcom,acc-sel-l2-bit-pos = <8>; qcom,corner-acc-map = <0 1 1>; }; apc_vreg_corner: regulator@b018000 { compatible = "qcom,cpr-regulator"; reg = <0xb018000 0x1000>, <0xb011064 4>, <0x58000 0x1000>; Loading @@ -45,6 +58,8 @@ vdd-mx-supply = <&pm8916_l3>; qcom,vdd-mx-vmax = <1287500>; mem-acc-supply = <&mem_acc_vreg_corner>; qcom,cpr-ref-clk = <19200>; qcom,cpr-timer-delay = <5000>; qcom,cpr-timer-cons-up = <0>; Loading