Loading arch/arm/boot/dts/qcom/msmplutonium.dtsi +40 −15 Original line number Diff line number Diff line Loading @@ -167,21 +167,6 @@ <&clock_gcc clk_gcc_blsp1_ahb_clk>; }; clock_gcc: qcom,gcc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; clock_mmss: qcom,mmsscc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; clock_rpm: qcom,rpmcc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; qcom,sps@f9984000 { compatible = "qcom,msm_sps"; reg-names = "bam_mem", "core_mem"; Loading Loading @@ -401,6 +386,46 @@ compatible = "qcom,android-usb"; reg = <0xfe87f0c8 0xc8>; }; clock_rpm: qcom,rpmcc@fc401880 { compatible = "qcom,rpmcc-plutonium"; reg = <0xfc401880 0x4>; reg-names = "cc_base"; #clock-cells = <1>; }; clock_gcc: qcom,gcc@fc400000 { compatible = "qcom,gcc-plutonium"; reg = <0xfc400000 0x2000>; reg-names = "cc_base"; vdd_dig-supply = <&pmplutonium_s1_corner>; clock-names = "xo", "xo_a_clk"; clocks = <&clock_rpm clk_cxo_gcc>, <&clock_rpm clk_cxo_clk_src_ao>; #clock-cells = <1>; }; clock_mmss: qcom,mmsscc@fd8c0000 { compatible = "qcom,mmsscc-plutonium"; reg = <0xfd8c0000 0x5200>; reg-names = "cc_base"; vdd_dig-supply = <&pmplutonium_s1_corner>; clock-names = "xo", "gpll0", "mmssnoc_ahb"; clocks = <&clock_rpm clk_cxo_mmss>, <&clock_gcc clk_gpll0_out_main>, <&clock_rpm clk_mmssnoc_ahb_clk>; #clock-cells = <1>; }; clock_debug: qcom,cc-debug@fc401880 { compatible = "qcom,cc-debug-plutonium"; reg = <0xfc401880 0x4>; reg-names = "cc_base"; clock-names = "debug_mmss_clk", "debug_rpm_clk"; clocks = <&clock_mmss clk_mmss_debug_mux>, <&clock_rpm clk_rpm_debug_mux>; #clock-cells = <1>; }; }; &gdsc_usb30 { Loading Loading
arch/arm/boot/dts/qcom/msmplutonium.dtsi +40 −15 Original line number Diff line number Diff line Loading @@ -167,21 +167,6 @@ <&clock_gcc clk_gcc_blsp1_ahb_clk>; }; clock_gcc: qcom,gcc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; clock_mmss: qcom,mmsscc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; clock_rpm: qcom,rpmcc { compatible = "qcom,dummycc"; #clock-cells = <1>; }; qcom,sps@f9984000 { compatible = "qcom,msm_sps"; reg-names = "bam_mem", "core_mem"; Loading Loading @@ -401,6 +386,46 @@ compatible = "qcom,android-usb"; reg = <0xfe87f0c8 0xc8>; }; clock_rpm: qcom,rpmcc@fc401880 { compatible = "qcom,rpmcc-plutonium"; reg = <0xfc401880 0x4>; reg-names = "cc_base"; #clock-cells = <1>; }; clock_gcc: qcom,gcc@fc400000 { compatible = "qcom,gcc-plutonium"; reg = <0xfc400000 0x2000>; reg-names = "cc_base"; vdd_dig-supply = <&pmplutonium_s1_corner>; clock-names = "xo", "xo_a_clk"; clocks = <&clock_rpm clk_cxo_gcc>, <&clock_rpm clk_cxo_clk_src_ao>; #clock-cells = <1>; }; clock_mmss: qcom,mmsscc@fd8c0000 { compatible = "qcom,mmsscc-plutonium"; reg = <0xfd8c0000 0x5200>; reg-names = "cc_base"; vdd_dig-supply = <&pmplutonium_s1_corner>; clock-names = "xo", "gpll0", "mmssnoc_ahb"; clocks = <&clock_rpm clk_cxo_mmss>, <&clock_gcc clk_gpll0_out_main>, <&clock_rpm clk_mmssnoc_ahb_clk>; #clock-cells = <1>; }; clock_debug: qcom,cc-debug@fc401880 { compatible = "qcom,cc-debug-plutonium"; reg = <0xfc401880 0x4>; reg-names = "cc_base"; clock-names = "debug_mmss_clk", "debug_rpm_clk"; clocks = <&clock_mmss clk_mmss_debug_mux>, <&clock_rpm clk_rpm_debug_mux>; #clock-cells = <1>; }; }; &gdsc_usb30 { Loading