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Commit 4f37940d authored by Samuel R. C. Vale's avatar Samuel R. C. Vale Committed by Jiri Kosina
Browse files

trivial: fix typos in comments s/DGBU/DBGU/



DBGU means Debug Unit, was refered as "DGBU" in some files. Fixed to "DBGU".

Signed-off-by: default avatarSamuel R. C. Vale <srcvale@holoscopio.com>
Acked-by: default avatarAndrew Victor <linux@maxim.org.za>
Signed-off-by: default avatarJiri Kosina <jkosina@suse.cz>
parent 3f6db50f
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+1 −1
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ static void __init afeb9260_map_io(void)
	/* Initialize processor: 18.432 MHz crystal */
	at91sam9260_initialize(18432000);

	/* DGBU on ttyS0. (Rx & Tx only) */
	/* DBGU on ttyS0. (Rx & Tx only) */
	at91_register_uart(0, 0, 0);

	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ static void __init cam60_map_io(void)
	/* Initialize processor: 10 MHz crystal */
	at91sam9260_initialize(10000000);

	/* DGBU on ttyS0. (Rx & Tx only) */
	/* DBGU on ttyS0. (Rx & Tx only) */
	at91_register_uart(0, 0, 0);

	/* set serial console to ttyS0 (ie, DBGU) */
+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ static void __init neocore926_map_io(void)
	/* Initialize processor: 20 MHz crystal */
	at91sam9263_initialize(20000000);

	/* DGBU on ttyS0. (Rx & Tx only) */
	/* DBGU on ttyS0. (Rx & Tx only) */
	at91_register_uart(0, 0, 0);

	/* USART0 on ttyS1. (Rx, Tx, RTS, CTS) */
+1 −1
Original line number Diff line number Diff line
@@ -53,7 +53,7 @@ static void __init ek_map_io(void)
	/* Initialize processor: 12.000 MHz crystal */
	at91sam9260_initialize(12000000);

	/* DGBU on ttyS0. (Rx & Tx only) */
	/* DBGU on ttyS0. (Rx & Tx only) */
	at91_register_uart(0, 0, 0);

	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
+1 −1
Original line number Diff line number Diff line
@@ -54,7 +54,7 @@ static void __init ek_map_io(void)
	/* Initialize processor: 18.432 MHz crystal */
	at91sam9260_initialize(18432000);

	/* DGBU on ttyS0. (Rx & Tx only) */
	/* DBGU on ttyS0. (Rx & Tx only) */
	at91_register_uart(0, 0, 0);

	/* USART0 on ttyS1. (Rx, Tx, CTS, RTS, DTR, DSR, DCD, RI) */
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