Loading arch/arm/boot/dts/mpq8092-iommu.dtsi +106 −38 Original line number Diff line number Diff line Loading @@ -12,72 +12,140 @@ /include/ "msm-iommu-v1.dtsi" &jpeg_iommu { &soc { mdp_iommu_8092: qcom,iommu@fd92a000 { compatible = "qcom,msm-smmu-v1"; #address-cells = <1>; #size-cells = <1>; ranges; reg = <0xfd92a000 0x10000>; reg-names = "iommu_base"; interrupts = <0 73 0>, <0 229 0>, <0 231 0>, <0 230 0>, <0 232 0>; interrupt-names = "pmon", "global_cfg_NS_irq", "global_client_NS_irq", "global_cfg_S_irq", "global_client_S_irq"; qcom,iommu-secure-id = <1>; label = "mdp_iommu_8092"; qcom,msm-bus,name = "mdp_ebi"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <22 512 0 0>, <22 512 0 1000>; status = "ok"; qcom,iommu-pmu-ngroups = <1>; qcom,iommu-pmu-ncounters = <8>; qcom,iommu-pmu-event-classes = <0x00 0x01 0x08 0x09 0x0A 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008>; 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014>; qcom,iommu-bfb-data = <0x0F qcom,iommu-bfb-data = <0x3FFFF 0x4 0x4 0x0 0x1000 0x0e00 0x8207 0x0 0x0 0x8 0x24 0x0 0x0 0x4 0x14 0x0 0x800 0x800 0x3a04 0x0 0x0>; qcom,iommu-ctx@fd932000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfd932000 0x1000>; interrupts = <0 47 0>; qcom,iommu-ctx-sids = <0>; label = "mdp_0"; }; &mdp_iommu { qcom,iommu-ctx@fd933000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfd933000 0x1000>; interrupts = <0 47 0>, <0 46 0>; qcom,iommu-ctx-sids = <1>; label = "mdp_1"; qcom,secure-context; }; qcom,iommu-ctx@fd934000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfd934000 0x1000>; interrupts = <0 47 0>, <0 46 0>; qcom,iommu-ctx-sids = <>; label = "mdp_2"; qcom,secure-context; }; }; }; &jpeg_iommu { status = "ok"; qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014>; 0x20ac 0x215c 0x220c 0x22bc 0x2008>; qcom,iommu-bfb-data = <0x3FFFF qcom,iommu-bfb-data = <0x0F 0x4 0x4 0x0 0x1000 0x0e00 0x8207 0x0 0x0 0x8 0x24 0x0 0x0 0x4 0x14 0x0 0x800 0x800 0x3a04 0x0 0x0>; }; Loading arch/arm/mach-msm/clock-8092.c +2 −2 Original line number Diff line number Diff line Loading @@ -296,8 +296,8 @@ static struct clk_lookup msm_clocks_8092[] = { CLK_DUMMY("iface_clk", NULL, "fda64000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fda64000.qcom,iommu", OFF), CLK_DUMMY("alt_core_clk", NULL, "fda64000.qcom,iommu", OFF), CLK_DUMMY("iface_clk", NULL, "fd928000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fd928000.qcom,iommu", oFF), CLK_DUMMY("iface_clk", NULL, "fd92a000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fd92a000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fdb10000.qcom,iommu", OFF), CLK_DUMMY("iface_clk", NULL, "fdb10000.qcom,iommu", OFF), CLK_DUMMY("iface_clk", NULL, "fdc84000.qcom,iommu", OFF), Loading Loading
arch/arm/boot/dts/mpq8092-iommu.dtsi +106 −38 Original line number Diff line number Diff line Loading @@ -12,72 +12,140 @@ /include/ "msm-iommu-v1.dtsi" &jpeg_iommu { &soc { mdp_iommu_8092: qcom,iommu@fd92a000 { compatible = "qcom,msm-smmu-v1"; #address-cells = <1>; #size-cells = <1>; ranges; reg = <0xfd92a000 0x10000>; reg-names = "iommu_base"; interrupts = <0 73 0>, <0 229 0>, <0 231 0>, <0 230 0>, <0 232 0>; interrupt-names = "pmon", "global_cfg_NS_irq", "global_client_NS_irq", "global_cfg_S_irq", "global_client_S_irq"; qcom,iommu-secure-id = <1>; label = "mdp_iommu_8092"; qcom,msm-bus,name = "mdp_ebi"; qcom,msm-bus,num-cases = <2>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <22 512 0 0>, <22 512 0 1000>; status = "ok"; qcom,iommu-pmu-ngroups = <1>; qcom,iommu-pmu-ncounters = <8>; qcom,iommu-pmu-event-classes = <0x00 0x01 0x08 0x09 0x0A 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008>; 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014>; qcom,iommu-bfb-data = <0x0F qcom,iommu-bfb-data = <0x3FFFF 0x4 0x4 0x0 0x1000 0x0e00 0x8207 0x0 0x0 0x8 0x24 0x0 0x0 0x4 0x14 0x0 0x800 0x800 0x3a04 0x0 0x0>; qcom,iommu-ctx@fd932000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfd932000 0x1000>; interrupts = <0 47 0>; qcom,iommu-ctx-sids = <0>; label = "mdp_0"; }; &mdp_iommu { qcom,iommu-ctx@fd933000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfd933000 0x1000>; interrupts = <0 47 0>, <0 46 0>; qcom,iommu-ctx-sids = <1>; label = "mdp_1"; qcom,secure-context; }; qcom,iommu-ctx@fd934000 { compatible = "qcom,msm-smmu-v1-ctx"; reg = <0xfd934000 0x1000>; interrupts = <0 47 0>, <0 46 0>; qcom,iommu-ctx-sids = <>; label = "mdp_2"; qcom,secure-context; }; }; }; &jpeg_iommu { status = "ok"; qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008 0x200c 0x2010 0x2014>; 0x20ac 0x215c 0x220c 0x22bc 0x2008>; qcom,iommu-bfb-data = <0x3FFFF qcom,iommu-bfb-data = <0x0F 0x4 0x4 0x0 0x1000 0x0e00 0x8207 0x0 0x0 0x8 0x24 0x0 0x0 0x4 0x14 0x0 0x800 0x800 0x3a04 0x0 0x0>; }; Loading
arch/arm/mach-msm/clock-8092.c +2 −2 Original line number Diff line number Diff line Loading @@ -296,8 +296,8 @@ static struct clk_lookup msm_clocks_8092[] = { CLK_DUMMY("iface_clk", NULL, "fda64000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fda64000.qcom,iommu", OFF), CLK_DUMMY("alt_core_clk", NULL, "fda64000.qcom,iommu", OFF), CLK_DUMMY("iface_clk", NULL, "fd928000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fd928000.qcom,iommu", oFF), CLK_DUMMY("iface_clk", NULL, "fd92a000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fd92a000.qcom,iommu", OFF), CLK_DUMMY("core_clk", NULL, "fdb10000.qcom,iommu", OFF), CLK_DUMMY("iface_clk", NULL, "fdb10000.qcom,iommu", OFF), CLK_DUMMY("iface_clk", NULL, "fdc84000.qcom,iommu", OFF), Loading