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Commit 011fdfee authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "msm: pil-q6v5: Add support for QDSP6v5.2.0"

parents 4bfe1d3a ab73c258

arch/arm/mach-msm/pil-msa.c

+15 −7
Original line number Diff line number Diff line
@@ -177,10 +177,16 @@ static int pil_msa_pbl_shutdown(struct pil_desc *pil) 
{

	struct q6v5_data *drv = container_of(pil, struct q6v5_data, desc);



	pil_q6v5_halt_axi_port(pil, drv->axi_halt_base + MSS_Q6_HALT_BASE);

	pil_q6v5_halt_axi_port(pil, drv->axi_halt_base + MSS_MODEM_HALT_BASE);

	pil_q6v5_halt_axi_port(pil, drv->axi_halt_base + MSS_NC_HALT_BASE);

	if (drv->axi_halt_base) {

		pil_q6v5_halt_axi_port(pil,

			drv->axi_halt_base + MSS_Q6_HALT_BASE);

		pil_q6v5_halt_axi_port(pil,

			drv->axi_halt_base + MSS_MODEM_HALT_BASE);

		pil_q6v5_halt_axi_port(pil,

			drv->axi_halt_base + MSS_NC_HALT_BASE);

	}



	if (drv->restart_reg)

		writel_relaxed(1, drv->restart_reg);



	if (drv->is_booted) {
@@ -207,9 +213,11 @@ static int pil_msa_pbl_reset(struct pil_desc *pil) 
		goto err_power;



	/* Deassert reset to subsystem and wait for propagation */

	if (drv->restart_reg) {

		writel_relaxed(0, drv->restart_reg);

		mb();

		udelay(2);

	}



	ret = pil_msa_pbl_enable_clks(drv);

	if (ret)

arch/arm/mach-msm/pil-q6v5.c

+19 −8
Original line number Diff line number Diff line
@@ -44,6 +44,7 @@ 


/* QDSP6SS_GFMUX_CTL */

#define Q6SS_CLK_ENA			BIT(1)

#define Q6SS_CLK_SRC_SEL_C		BIT(3)



/* QDSP6SS_PWR_CTL */

#define Q6SS_L2DATA_SLP_NRET_N_0	BIT(0)
@@ -246,6 +247,10 @@ static int __pil_q6v5_reset(struct pil_desc *pil) 
	/* Turn on core clock */

	val = readl_relaxed(drv->reg_base + QDSP6SS_GFMUX_CTL);

	val |= Q6SS_CLK_ENA;



	/* Need a different clock source for v5.2.0 */

	if (drv->qdsp6v5_2_0)

		val |= Q6SS_CLK_SRC_SEL_C;

	writel_relaxed(val, drv->reg_base + QDSP6SS_GFMUX_CTL);



	/* Start core execution */
@@ -358,6 +363,20 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) 
	if (!drv->reg_base)

		return ERR_PTR(-ENOMEM);



	desc = &drv->desc;

	ret = of_property_read_string(pdev->dev.of_node, "qcom,firmware-name",

				      &desc->name);

	if (ret)

		return ERR_PTR(ret);



	desc->dev = &pdev->dev;



	drv->qdsp6v5_2_0 = of_device_is_compatible(pdev->dev.of_node,

						   "qcom,pil-femto-modem");



	if (drv->qdsp6v5_2_0)

		return drv;



	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "halt_base");

	drv->axi_halt_base = devm_ioremap(&pdev->dev, res->start,

					  resource_size(res));
@@ -369,12 +388,6 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) 
	drv->qdsp6v55 |= of_device_is_compatible(pdev->dev.of_node,

						"qcom,pil-q6v55-lpass");



	desc = &drv->desc;

	ret = of_property_read_string(pdev->dev.of_node, "qcom,firmware-name",

				      &desc->name);

	if (ret)

		return ERR_PTR(ret);



	drv->xo = devm_clk_get(&pdev->dev, "xo");

	if (IS_ERR(drv->xo))

		return ERR_CAST(drv->xo);
@@ -408,8 +421,6 @@ struct q6v5_data *pil_q6v5_init(struct platform_device *pdev) 
		 drv->vreg_pll = NULL;

	}



	desc->dev = &pdev->dev;



	return drv;

}

EXPORT_SYMBOL(pil_q6v5_init);

arch/arm/mach-msm/pil-q6v5.h

+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ struct q6v5_data { 
	struct pil_desc desc;

	bool self_auth;

	bool qdsp6v55;

	bool qdsp6v5_2_0;

};



int pil_q6v5_make_proxy_votes(struct pil_desc *pil);