Loading Documentation/devicetree/bindings/arm/msm/clock-controller-v2.txt +26 −0 Original line number Diff line number Diff line Loading @@ -284,3 +284,29 @@ gcc_bam_dma_ahb_clk: gcc_bam_dma_ahb_clk { qcom,en-bit = <12>; qcom,parent = <&pnoc_clk>; }; ***************************************************************************** "qcom,gate-clk" A simple clock which can only turn on or off. Required Properties: - compatible: "qcom,gate-clk" - qcom,en-offset: Register offset from the region described in parent clock controller. - qcom,en-bit: Bit used to enable the clock Recommended Properties: - qcom,parent: See "General Optional Properties" Optional Properties: - qcom,delay: Delay(us) to use before/after turning on/off the clock. mmss_gpll0_clk_src: mmss_gpll0_clk_src { compatible = "qcom,gate-clk"; qcom,en-offset = <GCC_APCS_CLOCK_BRANCH_ENA_VOTE>; qcom,en-bit = <26>; qcom,parent = <&gpll0>; qcom,delay = <1>; }; drivers/clk/qcom/clock-local2.c +40 −0 Original line number Diff line number Diff line Loading @@ -1591,3 +1591,43 @@ static void *local_vote_clk_dt_parser(struct device *dev, return msmclk_generic_clk_init(dev, np, &vote_clk->c); } MSMCLK_PARSER(local_vote_clk_dt_parser, "qcom,local-vote-clk", 0); static void *gate_clk_dt_parser(struct device *dev, struct device_node *np) { struct gate_clk *gate_clk; struct msmclk_data *drv; u32 en_bit, rc; gate_clk = devm_kzalloc(dev, sizeof(*gate_clk), GFP_KERNEL); if (!gate_clk) { dt_err(np, "memory alloc failure\n"); return ERR_PTR(-ENOMEM); } drv = msmclk_parse_phandle(dev, np->parent->phandle); if (IS_ERR_OR_NULL(drv)) return ERR_CAST(drv); gate_clk->base = &drv->base; rc = of_property_read_u32(np, "qcom,en-offset", &gate_clk->en_reg); if (rc) { dt_err(np, "missing qcom,en-offset dt property\n"); return ERR_PTR(-EINVAL); } rc = of_property_read_u32(np, "qcom,en-bit", &en_bit); if (rc) { dt_err(np, "missing qcom,en-bit dt property\n"); return ERR_PTR(-EINVAL); } gate_clk->en_mask = BIT(en_bit); /* Optional Property */ rc = of_property_read_u32(np, "qcom,delay", &gate_clk->delay_us); if (rc) gate_clk->delay_us = 0; gate_clk->c.ops = &clk_ops_gate; return msmclk_generic_clk_init(dev, np, &gate_clk->c); } MSMCLK_PARSER(gate_clk_dt_parser, "qcom,gate-clk", 0); include/soc/qcom/clock-local2.h +3 −3 Original line number Diff line number Diff line Loading @@ -184,9 +184,9 @@ static inline struct measure_clk *to_measure_clk(struct clk *clk) */ struct gate_clk { struct clk c; const u32 en_mask; const u32 en_reg; const unsigned int delay_us; u32 en_mask; u32 en_reg; unsigned int delay_us; void *const __iomem *base; }; Loading Loading
Documentation/devicetree/bindings/arm/msm/clock-controller-v2.txt +26 −0 Original line number Diff line number Diff line Loading @@ -284,3 +284,29 @@ gcc_bam_dma_ahb_clk: gcc_bam_dma_ahb_clk { qcom,en-bit = <12>; qcom,parent = <&pnoc_clk>; }; ***************************************************************************** "qcom,gate-clk" A simple clock which can only turn on or off. Required Properties: - compatible: "qcom,gate-clk" - qcom,en-offset: Register offset from the region described in parent clock controller. - qcom,en-bit: Bit used to enable the clock Recommended Properties: - qcom,parent: See "General Optional Properties" Optional Properties: - qcom,delay: Delay(us) to use before/after turning on/off the clock. mmss_gpll0_clk_src: mmss_gpll0_clk_src { compatible = "qcom,gate-clk"; qcom,en-offset = <GCC_APCS_CLOCK_BRANCH_ENA_VOTE>; qcom,en-bit = <26>; qcom,parent = <&gpll0>; qcom,delay = <1>; };
drivers/clk/qcom/clock-local2.c +40 −0 Original line number Diff line number Diff line Loading @@ -1591,3 +1591,43 @@ static void *local_vote_clk_dt_parser(struct device *dev, return msmclk_generic_clk_init(dev, np, &vote_clk->c); } MSMCLK_PARSER(local_vote_clk_dt_parser, "qcom,local-vote-clk", 0); static void *gate_clk_dt_parser(struct device *dev, struct device_node *np) { struct gate_clk *gate_clk; struct msmclk_data *drv; u32 en_bit, rc; gate_clk = devm_kzalloc(dev, sizeof(*gate_clk), GFP_KERNEL); if (!gate_clk) { dt_err(np, "memory alloc failure\n"); return ERR_PTR(-ENOMEM); } drv = msmclk_parse_phandle(dev, np->parent->phandle); if (IS_ERR_OR_NULL(drv)) return ERR_CAST(drv); gate_clk->base = &drv->base; rc = of_property_read_u32(np, "qcom,en-offset", &gate_clk->en_reg); if (rc) { dt_err(np, "missing qcom,en-offset dt property\n"); return ERR_PTR(-EINVAL); } rc = of_property_read_u32(np, "qcom,en-bit", &en_bit); if (rc) { dt_err(np, "missing qcom,en-bit dt property\n"); return ERR_PTR(-EINVAL); } gate_clk->en_mask = BIT(en_bit); /* Optional Property */ rc = of_property_read_u32(np, "qcom,delay", &gate_clk->delay_us); if (rc) gate_clk->delay_us = 0; gate_clk->c.ops = &clk_ops_gate; return msmclk_generic_clk_init(dev, np, &gate_clk->c); } MSMCLK_PARSER(gate_clk_dt_parser, "qcom,gate-clk", 0);
include/soc/qcom/clock-local2.h +3 −3 Original line number Diff line number Diff line Loading @@ -184,9 +184,9 @@ static inline struct measure_clk *to_measure_clk(struct clk *clk) */ struct gate_clk { struct clk c; const u32 en_mask; const u32 en_reg; const unsigned int delay_us; u32 en_mask; u32 en_reg; unsigned int delay_us; void *const __iomem *base; }; Loading