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Commit fb6bc187 authored by Sameer Thalappil's avatar Sameer Thalappil
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cnss: Reserve 0-4K memory for QCA6174



MAC hardware on QCA6174 has a bug that is causing an invalid pointer
fetch based on the data that is read from 0 to 4K. And when the
data read from 0 to 4K address range is translating to a high
order address, PCIe RC would return a read abort error, and that
results in an internal AXI error. So allocate/reserve this memory
and fill it with zero's (populate the redirected 0 to 4K to a memory
address that is essentially populated with data that translates
to an address for which PCIe RC honored the read without any errors).
Note that the read value is not used by MAC for any further
operations.

CRs-Fixed: 658944
Change-Id: Ic53ef99e20651d3f5e5649ab25a1599eba0f09c2
Signed-off-by: default avatarSameer Thalappil <sameert@codeaurora.org>
parent 962ed456
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+2 −0
Original line number Diff line number Diff line
@@ -10,6 +10,8 @@
 * GNU General Public License for more details.
 */

/memreserve/ 0x00000000 0x00001000;

#include "skeleton64.dtsi"
#include <dt-bindings/clock/msm-clocks-krait.h>

+9 −0
Original line number Diff line number Diff line
@@ -335,6 +335,15 @@ config WCNSS_REGISTER_DUMP_ON_BITE
	 register access failures. So this feature is to enable/disable the
	 register dump on WCNSS WDOG bite.

config CNSS_MAC_BUG
	bool "Enable/disable 0-4K memory initialization for QCA6174"
	depends on CNSS
	help
	 If enabled, 0-4K memory is reserved for QCA6174 to address a MAC HW bug.
	 MAC would do an invalid pointer fetch based on the data, that was read
	 from 0 to 4K. So fill it with zero's; to an address for which PCIe root
	 complex would honor the read without any errors.

config CLD_LL_CORE
	tristate "Qualcomm CORE driver for QCA6174"
	select WIRELESS_EXT
+9 −0
Original line number Diff line number Diff line
@@ -1147,6 +1147,15 @@ static int cnss_probe(struct platform_device *pdev)
		}
	}

#ifdef CONFIG_CNSS_MAC_BUG
	/* 0-4K memory is reserved for QCA6174 to address a MAC HW bug.
	 * MAC would do an invalid pointer fetch based on the data
	 * that was read from 0 to 4K. So fill it with zero's (to an
	 * address for which PCIe RC honored the read without any errors).
	 */
	memset(phys_to_virt(0), 0, SZ_4K);
#endif

	pr_info("cnss: Platform driver probed successfully.\n");
	return ret;