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Commit f9e4a005 authored by Kumar Gala's avatar Kumar Gala Committed by Linus Torvalds
Browse files

[PATCH] ppc32: Add soft reset to MPC834x 



This change allows mpc83xx_restart to issue a software reset.

Signed-off-by: default avatarRandy Vinson <rvinson@mvista.com>
Signed-off-by: default avatarKumar Gala <kumar.gala@freescale.com>
Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
parent ff945023

arch/ppc/platforms/83xx/mpc834x_sys.h

+6 −0
Original line number Original line Diff line number Diff line
@@ -28,6 +28,12 @@ 
#define BCSR_PHYS_ADDR		((uint)0xf8000000)

#define BCSR_PHYS_ADDR		((uint)0xf8000000)

#define BCSR_SIZE		((uint)(32 * 1024))

#define BCSR_SIZE		((uint)(32 * 1024))





#define BCSR_MISC_REG2_OFF	0x07

#define BCSR_MISC_REG2_PORESET	0x01



#define BCSR_MISC_REG3_OFF	0x08

#define BCSR_MISC_REG3_CNFLOCK	0x80



#ifdef CONFIG_PCI

#ifdef CONFIG_PCI

/* PCI interrupt controller */

/* PCI interrupt controller */

#define PIRQA        MPC83xx_IRQ_IRQ4

#define PIRQA        MPC83xx_IRQ_IRQ4

arch/ppc/syslib/ppc83xx_setup.c

+28 −0
Original line number Original line Diff line number Diff line
@@ -29,6 +29,7 @@ 
#include <asm/mmu.h>

#include <asm/mmu.h>

#include <asm/ppc_sys.h>

#include <asm/ppc_sys.h>

#include <asm/kgdb.h>

#include <asm/kgdb.h>

#include <asm/delay.h>





#include <syslib/ppc83xx_setup.h>

#include <syslib/ppc83xx_setup.h>
@@ -117,7 +118,34 @@ mpc83xx_early_serial_map(void) 
void

void

mpc83xx_restart(char *cmd)

mpc83xx_restart(char *cmd)

{

{

	volatile unsigned char __iomem *reg;

	unsigned char tmp;



	reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);



	local_irq_disable();

	local_irq_disable();



	/*

	 * Unlock the BCSR bits so a PRST will update the contents.

	 * Otherwise the reset asserts but doesn't clear.

	 */

	tmp = in_8(reg + BCSR_MISC_REG3_OFF);

	tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */

	out_8(reg + BCSR_MISC_REG3_OFF, tmp);



	/*

	 * Trigger a reset via a low->high transition of the

	 * PORESET bit.

	 */

	tmp = in_8(reg + BCSR_MISC_REG2_OFF);

	tmp &= ~BCSR_MISC_REG2_PORESET;

	out_8(reg + BCSR_MISC_REG2_OFF, tmp);



	udelay(1);



	tmp |= BCSR_MISC_REG2_PORESET;

	out_8(reg + BCSR_MISC_REG2_OFF, tmp);



	for(;;);

	for(;;);

}

}