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Commit f82855d3 authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
Browse files

drm/i915: Fix CAGF for HSW 



The shift changed, hurray.

Reported-by: default avatarKenneth Graunke <kenneth@whitecape.org>
Cc: Paulo Zanoni <przanoni@gmail.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent e78891ca

drivers/gpu/drm/i915/i915_debugfs.c

+7 −3
Original line number Diff line number Diff line
@@ -957,7 +957,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) 
		u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);

		u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);

		u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);

		u32 rpstat;

		u32 rpstat, cagf;

		u32 rpupei, rpcurup, rpprevup;

		u32 rpdownei, rpcurdown, rpprevdown;

		int max_freq;
@@ -976,6 +976,11 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) 
		rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);

		rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);

		rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);

		if (IS_HASWELL(dev))

			cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;

		else

			cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;

		cagf *= GT_FREQUENCY_MULTIPLIER;



		gen6_gt_force_wake_put(dev_priv);

		mutex_unlock(&dev->struct_mutex);
@@ -988,8 +993,7 @@ static int i915_cur_delayinfo(struct seq_file *m, void *unused) 
			   gt_perf_status & 0xff);

		seq_printf(m, "Render p-state limit: %d\n",

			   rp_state_limits & 0xff);

		seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>

						GEN6_CAGF_SHIFT) * GT_FREQUENCY_MULTIPLIER);

		seq_printf(m, "CAGF: %dMHz\n", cagf);

		seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &

			   GEN6_CURICONT_MASK);

		seq_printf(m, "RP CUR UP: %dus\n", rpcurup &

drivers/gpu/drm/i915/i915_reg.h

+2 −0
Original line number Diff line number Diff line
@@ -4196,7 +4196,9 @@ 
#define GEN6_RP_INTERRUPT_LIMITS		0xA014

#define GEN6_RPSTAT1				0xA01C

#define   GEN6_CAGF_SHIFT			8

#define   HSW_CAGF_SHIFT			7

#define   GEN6_CAGF_MASK			(0x7f << GEN6_CAGF_SHIFT)

#define   HSW_CAGF_MASK				(0x7f << HSW_CAGF_SHIFT)

#define GEN6_RP_CONTROL				0xA024

#define   GEN6_RP_MEDIA_TURBO			(1<<11)

#define   GEN6_RP_MEDIA_MODE_MASK		(3<<9)