Loading arch/arm/boot/dts/qcom/msmferrum-rumi.dts +51 −0 Original line number Diff line number Diff line Loading @@ -40,3 +40,54 @@ &pmferrum_gpios { status = "disabled"; }; &sdhc_1 { vdd-supply = <&pmferrum_l8>; qcom,vdd-voltage-level = <2900000 2900000>; qcom,vdd-current-level = <200 400000>; vdd-io-supply = <&pmferrum_l5>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 60000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>; qcom,clk-rates = <400000 25000000 50000000 100000000 200000000 >; qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; qcom,nonremovable; status = "ok"; }; &sdhc_2 { #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &msm_gpio 38 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&msm_gpio 38 0x1>; vdd-supply = <&pmferrum_l11>; qcom,vdd-voltage-level = <1800000 2950000>; qcom,vdd-current-level = <15000 400000>; vdd-io-supply = <&pmferrum_l12>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 50000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>; status = "ok"; }; Loading
arch/arm/boot/dts/qcom/msmferrum-rumi.dts +51 −0 Original line number Diff line number Diff line Loading @@ -40,3 +40,54 @@ &pmferrum_gpios { status = "disabled"; }; &sdhc_1 { vdd-supply = <&pmferrum_l8>; qcom,vdd-voltage-level = <2900000 2900000>; qcom,vdd-current-level = <200 400000>; vdd-io-supply = <&pmferrum_l5>; qcom,vdd-io-always-on; qcom,vdd-io-lpm-sup; qcom,vdd-io-voltage-level = <1800000 1800000>; qcom,vdd-io-current-level = <200 60000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on>; pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off>; qcom,clk-rates = <400000 25000000 50000000 100000000 200000000 >; qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; qcom,nonremovable; status = "ok"; }; &sdhc_2 { #address-cells = <0>; interrupt-parent = <&sdhc_2>; interrupts = <0 1 2>; #interrupt-cells = <1>; interrupt-map-mask = <0xffffffff>; interrupt-map = <0 &intc 0 125 0 1 &intc 0 221 0 2 &msm_gpio 38 0>; interrupt-names = "hc_irq", "pwr_irq", "status_irq"; cd-gpios = <&msm_gpio 38 0x1>; vdd-supply = <&pmferrum_l11>; qcom,vdd-voltage-level = <1800000 2950000>; qcom,vdd-current-level = <15000 400000>; vdd-io-supply = <&pmferrum_l12>; qcom,vdd-io-voltage-level = <1800000 2950000>; qcom,vdd-io-current-level = <200 50000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off>; qcom,clk-rates = <400000 25000000 50000000 100000000 200000000>; status = "ok"; };