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Commit f6febdbf authored by Jordan Crouse's avatar Jordan Crouse
Browse files

msm: kgsl: Reduce the delay time for A4XX HLSQ reset in snapshot 



The HLSQ reset routine during snapshot read only needs a few cycles
to complete - an AHB register read should do the trick.

Change-Id: Ic0dedbadbdc4dd529a04fd6c363a7eb5f9548eba
Signed-off-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
parent 8784b285

drivers/gpu/msm/adreno_a4xx_snapshot.c

+5 −11
Original line number Diff line number Diff line
@@ -305,26 +305,20 @@ static void *a4xx_snapshot_debugbus(struct kgsl_device *device, 


static void a4xx_reset_hlsq(struct kgsl_device *device)

{

	unsigned long waittime;

	unsigned int val;

	unsigned int val, dummy = 0;



	/* reset cp */

	kgsl_regwrite(device, A4XX_RBBM_BLOCK_SW_RESET_CMD, 1 << 20);

	waittime = jiffies + 100;

	while (time_before(jiffies, waittime))

		;

	kgsl_regread(device, A4XX_RBBM_BLOCK_SW_RESET_CMD, &dummy);



	/* reset hlsq */

	kgsl_regwrite(device, A4XX_RBBM_BLOCK_SW_RESET_CMD, 1 << 25);

	waittime = jiffies + 100;

	while (time_before(jiffies, waittime))

		;

	kgsl_regread(device, A4XX_RBBM_BLOCK_SW_RESET_CMD, &dummy);



	/* clear reset bits */

	kgsl_regwrite(device, A4XX_RBBM_BLOCK_SW_RESET_CMD, 0);

	waittime = jiffies + 100;

	while (time_before(jiffies, waittime))

		;

	kgsl_regread(device, A4XX_RBBM_BLOCK_SW_RESET_CMD, &dummy);





	/* set HLSQ_TIMEOUT_THRESHOLD.cycle_timeout_limit_sp to 26 */

	kgsl_regread(device, A4XX_HLSQ_TIMEOUT_THRESHOLD, &val);