Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f63cb49d authored by Skylar Chang's avatar Skylar Chang
Browse files

msm: ipa: enable clock gating



resume ipa clock gating mechanism since
main feature of IPA is verified in Andoird
platform.

Change-Id: I21f6335662b646604aea82a03dfa4ca35cb60d68
Signed-off-by: default avatarSkylar Chang <chiaweic@codeaurora.org>
parent 4fe7d007
Loading
Loading
Loading
Loading
+2 −2
Original line number Diff line number Diff line
@@ -2042,8 +2042,8 @@ static int ipa_init(const struct ipa_plat_drv_res *resource_p,
		goto fail_bind;
	}

	/* Disable ipa_ctx->enable_clock_scaling 1 */
	ipa_ctx->enable_clock_scaling = 0;
	/* Enable ipa_ctx->enable_clock_scaling */
	ipa_ctx->enable_clock_scaling = 1;
	ipa_ctx->curr_ipa_clk_rate = ipa_ctx->ctrl->ipa_clk_rate_hi;

	/* enable IPA clocks explicitly to allow the initialization */
+1 −2
Original line number Diff line number Diff line
@@ -1013,8 +1013,7 @@ int ipa_setup_sys_pipe(struct ipa_sys_connect_params *sys_in, u32 *clnt_hdl)
	ep->client = sys_in->client;
	ep->client_notify = sys_in->notify;
	ep->priv = sys_in->priv;
	/* keep sys_in->keep_ipa_awake */
	ep->keep_ipa_awake = 1;
	ep->keep_ipa_awake = sys_in->keep_ipa_awake;
	atomic_set(&ep->avail_fifo_desc,
		((sys_in->desc_fifo_sz/sizeof(struct sps_iovec))-1));