Loading arch/arm/boot/dts/fsm9900.dtsi +19 −0 Original line number Diff line number Diff line Loading @@ -522,6 +522,25 @@ qcom,core-control-mask = <0xe>; }; qcom,msm-cpufreq@0 { reg = <0 4>; compatible = "qcom,msm-cpufreq"; qcom,cpu-mem-ports = <1 512>, <2 512>; qcom,cpufreq-table = < 300000 300000 600 /* 75 MHz */ >, < 422400 422400 1200 /* 150 MHz */ >, < 576000 576000 2456 /* 307 MHz */ >, < 729600 729600 2456 /* 307 MHz */ >, < 883200 883200 2456 /* 307 MHz */ >, < 1036800 1036800 3680 /* 460 MHz */ >, < 1190400 1190400 3680 /* 460 MHz */ >, < 1344000 1344000 6400 /* 800 MHz */ >, < 1497600 1497600 6400 /* 800 MHz */ >, < 1651200 1651200 6400 /* 800 MHz */ >, < 1804800 1651200 6400 /* 800 MHz */ >, < 1958400 1651200 6400 /* 800 MHz */ >; }; qcom,fuse@fc4b8000 { compatible = "qcom,qfp-fuse"; reg = <0xfc4b8000 0x7000>; Loading Loading
arch/arm/boot/dts/fsm9900.dtsi +19 −0 Original line number Diff line number Diff line Loading @@ -522,6 +522,25 @@ qcom,core-control-mask = <0xe>; }; qcom,msm-cpufreq@0 { reg = <0 4>; compatible = "qcom,msm-cpufreq"; qcom,cpu-mem-ports = <1 512>, <2 512>; qcom,cpufreq-table = < 300000 300000 600 /* 75 MHz */ >, < 422400 422400 1200 /* 150 MHz */ >, < 576000 576000 2456 /* 307 MHz */ >, < 729600 729600 2456 /* 307 MHz */ >, < 883200 883200 2456 /* 307 MHz */ >, < 1036800 1036800 3680 /* 460 MHz */ >, < 1190400 1190400 3680 /* 460 MHz */ >, < 1344000 1344000 6400 /* 800 MHz */ >, < 1497600 1497600 6400 /* 800 MHz */ >, < 1651200 1651200 6400 /* 800 MHz */ >, < 1804800 1651200 6400 /* 800 MHz */ >, < 1958400 1651200 6400 /* 800 MHz */ >; }; qcom,fuse@fc4b8000 { compatible = "qcom,qfp-fuse"; reg = <0xfc4b8000 0x7000>; Loading