Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f5310b75 authored by Phani Kumar Uppalapati's avatar Phani Kumar Uppalapati
Browse files

ASoC: wcd9330: Update codec register defaults based on codec version 



Update wcd9330 codec register default values based on
the version (v1.0 or v2.0) that is detected.

Change-Id: I55d9b3a240a9a9c3ca9a33d96ccb99dca83a2e02
Signed-off-by: default avatarPhani Kumar Uppalapati <phaniu@codeaurora.org>
parent 2238405e

include/linux/mfd/wcd9xxx/wcd9330_registers.h

+24 −0
Original line number Diff line number Diff line
@@ -1461,6 +1461,30 @@ 
#define TOMTOM_A_CDC_CONN_MISC__POR				(0x01)

#define TOMTOM_A_CDC_CONN_RX8_B1_CTL			(0x3B3)

#define TOMTOM_A_CDC_CONN_RX8_B1_CTL__POR				(0x00)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_B1_CTL		(0x3B4)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_B1_CTL__POR				(0x81)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_CLIP_LEVEL_ADJUST	(0x3B5)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_CLIP_LEVEL_ADJUST__POR		(0x00)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_MIN_CLIP_THRESHOLD	(0x3B6)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_MIN_CLIP_THRESHOLD__POR		(0xFF)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_THRESHOLD_STATUS	(0x3B7)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_THRESHOLD_STATUS__POR		(0x00)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_SAMPLE_MARK		(0x3B8)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_SAMPLE_MARK__POR			(0x04)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_BOOST_GATING		(0x3B9)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR_BOOST_GATING__POR			(0x04)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_B1_CTL		(0x3BA)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_B1_CTL__POR				(0x81)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_CLIP_LEVEL_ADJUST	(0x3BB)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_CLIP_LEVEL_ADJUST__POR		(0x00)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_MIN_CLIP_THRESHOLD	(0x3BC)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_MIN_CLIP_THRESHOLD__POR		(0xFF)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_THRESHOLD_STATUS	(0x3BD)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_THRESHOLD_STATUS__POR		(0x00)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_SAMPLE_MARK		(0x3BE)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_SAMPLE_MARK__POR			(0x04)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_BOOST_GATING	(0x3BF)

#define TOMTOM_A_CDC_CLIP_ADJ_SPKR2_BOOST_GATING__POR			(0x04)

#define TOMTOM_A_CDC_MBHC_EN_CTL			(0x3C0)

#define TOMTOM_A_CDC_MBHC_EN_CTL__POR				(0x00)

#define TOMTOM_A_CDC_MBHC_FIR_B1_CFG			(0x3C1)

sound/soc/codecs/wcd9330-tables.c

+36 −0
Original line number Diff line number Diff line
@@ -738,6 +738,18 @@ const u8 tomtom_reg_readable[TOMTOM_CACHE_SIZE] = { 
	[TOMTOM_A_CDC_CONN_CLSH_CTL] = 1,

	[TOMTOM_A_CDC_CONN_MISC] = 1,

	[TOMTOM_A_CDC_CONN_RX8_B1_CTL] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_B1_CTL] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_CLIP_LEVEL_ADJUST] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_MIN_CLIP_THRESHOLD] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_THRESHOLD_STATUS] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_SAMPLE_MARK] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_BOOST_GATING] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_B1_CTL] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_CLIP_LEVEL_ADJUST] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_MIN_CLIP_THRESHOLD] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_THRESHOLD_STATUS] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_SAMPLE_MARK] = 1,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_BOOST_GATING] = 1,

	[TOMTOM_A_CDC_MBHC_EN_CTL] = 1,

	[TOMTOM_A_CDC_MBHC_FIR_B1_CFG] = 1,

	[TOMTOM_A_CDC_MBHC_FIR_B2_CFG] = 1,
@@ -1573,6 +1585,30 @@ const u8 tomtom_reset_reg_defaults[TOMTOM_CACHE_SIZE] = { 
	[TOMTOM_A_CDC_CONN_CLSH_CTL] = TOMTOM_A_CDC_CONN_CLSH_CTL__POR,

	[TOMTOM_A_CDC_CONN_MISC] = TOMTOM_A_CDC_CONN_MISC__POR,

	[TOMTOM_A_CDC_CONN_RX8_B1_CTL] = TOMTOM_A_CDC_CONN_RX8_B1_CTL__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_B1_CTL] =

				TOMTOM_A_CDC_CLIP_ADJ_SPKR_B1_CTL__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_CLIP_LEVEL_ADJUST] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR_CLIP_LEVEL_ADJUST__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_MIN_CLIP_THRESHOLD] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR_MIN_CLIP_THRESHOLD__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_THRESHOLD_STATUS] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR_THRESHOLD_STATUS__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_SAMPLE_MARK] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR_SAMPLE_MARK__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR_BOOST_GATING] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR_BOOST_GATING__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_B1_CTL] =

				TOMTOM_A_CDC_CLIP_ADJ_SPKR2_B1_CTL__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_CLIP_LEVEL_ADJUST] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR2_CLIP_LEVEL_ADJUST__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_MIN_CLIP_THRESHOLD] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR2_MIN_CLIP_THRESHOLD__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_THRESHOLD_STATUS] =

			TOMTOM_A_CDC_CLIP_ADJ_SPKR2_THRESHOLD_STATUS__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_SAMPLE_MARK] =

				TOMTOM_A_CDC_CLIP_ADJ_SPKR2_SAMPLE_MARK__POR,

	[TOMTOM_A_CDC_CLIP_ADJ_SPKR2_BOOST_GATING] =

				TOMTOM_A_CDC_CLIP_ADJ_SPKR2_BOOST_GATING__POR,

	[TOMTOM_A_CDC_MBHC_EN_CTL] = TOMTOM_A_CDC_MBHC_EN_CTL__POR,

	[TOMTOM_A_CDC_MBHC_FIR_B1_CFG] = TOMTOM_A_CDC_MBHC_FIR_B1_CFG__POR,

	[TOMTOM_A_CDC_MBHC_FIR_B2_CFG] = TOMTOM_A_CDC_MBHC_FIR_B2_CFG__POR,

sound/soc/codecs/wcd9330.c

+50 −18
Original line number Diff line number Diff line
@@ -6459,14 +6459,14 @@ static const struct wcd9xxx_reg_mask_val tomtom_reg_defaults[] = { 
	TOMTOM_REG_VAL(TOMTOM_A_RX_EAR_CMBUFF, 0x05),



	/* RX deafults */

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX1_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX2_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX3_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX4_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX5_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX6_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX7_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX8_B5_CTL, 0x78),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX1_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX2_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX3_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX4_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX5_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX6_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX7_B5_CTL, 0x79),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX8_B5_CTL, 0x79),



	/* RX1 and RX2 defaults */

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX1_B6_CTL, 0xA0),
@@ -6542,16 +6542,16 @@ static const struct wcd9xxx_reg_mask_val tomtom_1_0_reg_defaults[] = { 
	TOMTOM_REG_VAL(TOMTOM_A_SPKR_DRV1_IEC, 0x0),

	TOMTOM_REG_VAL(TOMTOM_A_SPKR_DRV2_OCP_CTL, 0x97),

	TOMTOM_REG_VAL(TOMTOM_A_SPKR_DRV2_CLIP_DET, 0x1),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX1_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX2_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX3_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX4_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX5_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX6_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX7_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX8_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX9_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX10_MUX_CTL, 0x48),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX1_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX2_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX3_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX4_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX5_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX6_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX7_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX8_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX9_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_TX10_MUX_CTL, 0x4A),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX1_B4_CTL, 0xB),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX2_B4_CTL, 0xB),

	TOMTOM_REG_VAL(TOMTOM_A_CDC_RX3_B4_CTL, 0xB),
@@ -6572,9 +6572,18 @@ static const struct wcd9xxx_reg_mask_val tomtom_1_0_reg_defaults[] = { 
	TOMTOM_REG_VAL(TOMTOM_A_CDC_COMP0_B5_CTL, 0x7f),

};



static const struct wcd9xxx_reg_mask_val tomtom_2_0_reg_defaults[] = {

	TOMTOM_REG_VAL(TOMTOM_A_CDC_MAD_MAIN_CTL_2, 0x32),

	TOMTOM_REG_VAL(TOMTOM_A_RCO_CTRL, 0x10),

	TOMTOM_REG_VAL(TOMTOM_A_RX_HPH_L_TEST, 0x0A),

	TOMTOM_REG_VAL(TOMTOM_A_RX_HPH_R_TEST, 0x0A),



};



static void tomtom_update_reg_defaults(struct snd_soc_codec *codec)

{

	u32 i;

	struct wcd9xxx *tomtom_core = dev_get_drvdata(codec->dev->parent);



	for (i = 0; i < ARRAY_SIZE(tomtom_reg_defaults); i++)

		snd_soc_write(codec, tomtom_reg_defaults[i].reg,
@@ -6583,6 +6592,12 @@ static void tomtom_update_reg_defaults(struct snd_soc_codec *codec) 
	for (i = 0; i < ARRAY_SIZE(tomtom_1_0_reg_defaults); i++)

		snd_soc_write(codec, tomtom_1_0_reg_defaults[i].reg,

				tomtom_1_0_reg_defaults[i].val);



	if (!TOMTOM_IS_1_0(tomtom_core->version)) {

		for (i = 0; i < ARRAY_SIZE(tomtom_2_0_reg_defaults); i++)

			snd_soc_write(codec, tomtom_2_0_reg_defaults[i].reg,

				      tomtom_2_0_reg_defaults[i].val);

	}

}



static const struct wcd9xxx_reg_mask_val tomtom_codec_reg_init_val[] = {
@@ -6657,14 +6672,31 @@ static const struct wcd9xxx_reg_mask_val tomtom_codec_reg_init_val[] = { 
	{TOMTOM_A_CDC_MAD_INP_SEL, 0x0F, 0x08},

};



static const struct wcd9xxx_reg_mask_val tomtom_codec_2_0_reg_init_val[] = {

	{TOMTOM_A_RX_HPH_L_TEST, 0x08, 0x00},

	{TOMTOM_A_RX_HPH_R_TEST, 0x08, 0x00},

	{TOMTOM_A_CDC_CLIP_ADJ_SPKR_MIN_CLIP_THRESHOLD, 0xFF, 0x00},

	{TOMTOM_A_CDC_CLIP_ADJ_SPKR2_MIN_CLIP_THRESHOLD, 0xFF, 0x00},

};



static void tomtom_codec_init_reg(struct snd_soc_codec *codec)

{

	u32 i;

	struct wcd9xxx *tomtom_core = dev_get_drvdata(codec->dev->parent);



	for (i = 0; i < ARRAY_SIZE(tomtom_codec_reg_init_val); i++)

		snd_soc_update_bits(codec, tomtom_codec_reg_init_val[i].reg,

				tomtom_codec_reg_init_val[i].mask,

				tomtom_codec_reg_init_val[i].val);



	if (!TOMTOM_IS_1_0(tomtom_core->version)) {

		for (i = 0; i < ARRAY_SIZE(tomtom_codec_2_0_reg_init_val); i++)

			snd_soc_update_bits(codec,

				tomtom_codec_2_0_reg_init_val[i].reg,

				tomtom_codec_2_0_reg_init_val[i].mask,

				tomtom_codec_2_0_reg_init_val[i].val);

	}



}



static void tomtom_slim_interface_init_reg(struct snd_soc_codec *codec)