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Commit f42f5409 authored by Vijayavardhan Vennapusa's avatar Vijayavardhan Vennapusa
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USB: dwc3: Fix QDSS data integrity issue



Currently RAM12, RAM13 are being used for data fifo and
descriptor fifo allocations in QDSS BAM <-> BAM usecase. Remaining
16KB out of 29KB is being used for allocation of TX FIFO for
USB IN endpoints in the composition. This resulting in data corruption
when captured with host side application. Due to this, QTF host
application is not able to parse the data collected over USB.
Hence reserve RAM11, RAM12, RAM13 for 16KB data fifo allocation and
5KB descritor fifo allocation in QDSS mode and use remaining 8KB for
TX FIFO allocation for IN endpoints.

As available tx fifo size is reduced in QDSS mode, allocate 1KB for
bulk and isochronous endpoints in highspeed mode and also for nonburst
endpoints in superspeed mode. For burst endpoint in superspeed mode,
allocate 3KB for TX FIFO.

CRs-Fixed: 553147
Change-Id: I6d50d2da631a95a921c47bb1fb1139477840a73c
Signed-off-by: default avatarVijayavardhan Vennapusa <vvreddy@codeaurora.org>
parent 3be9dea1
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+2 −2
Original line number Diff line number Diff line
@@ -1562,7 +1562,7 @@
		qcom,misc-ref = <&pm8941_misc>;
		dwc_usb3-adc_tm = <&pm8941_adc_tm>;
		qcom,dwc-usb3-msm-tx-fifo-size = <29696>;
		qcom,dwc-usb3-msm-qdss-tx-fifo-size = <16384>;
		qcom,dwc-usb3-msm-qdss-tx-fifo-size = <8192>;

		qcom,msm-bus,name = "usb3";
		qcom,msm-bus,num-cases = <2>;
@@ -2152,7 +2152,7 @@
			qcom,src-bam-pipe-index = <0>;
			qcom,dst-bam-physical-address = <0xf9304000>;
			qcom,dst-bam-pipe-index = <2>;
			qcom,data-fifo-offset = <0xf2000>;
			qcom,data-fifo-offset = <0xf0000>;
			qcom,data-fifo-size = <0x1800>;
			qcom,descriptor-fifo-offset = <0xf4000>;
			qcom,descriptor-fifo-size = <0x1400>;
+2 −2
Original line number Diff line number Diff line
@@ -360,14 +360,14 @@ static int connect_pipe(u8 idx, u32 *usb_pipe_idx)
		/*
		 * Enable USB PRIVATE RAM to be used for BAM FIFOs
		 * HSUSB: Only RAM13 is used for BAM FIFOs
		 * SSUSB: RAM12, 13 are used for BAM FIFOs
		 * SSUSB: RAM11, 12, 13 are used for BAM FIFOs
		 */
		bam = pipe_connect->bam_type;

		if (bam == HSUSB_BAM)
			ram1_value = 0x4;
		else
			ram1_value = 0x6;
			ram1_value = 0x7;

		pr_debug("Writing 0x%x to QSCRATCH_RAM1\n", ram1_value);
		writel_relaxed(ram1_value, ctx.qscratch_ram1_reg);
+1 −0
Original line number Diff line number Diff line
@@ -814,6 +814,7 @@ struct dwc3 {
	bool			softconnect;
	void (*notify_event) (struct dwc3 *, unsigned);
	int			tx_fifo_size;
	bool			tx_fifo_reduced;
};

/* -------------------------------------------------------------------------- */
+5 −2
Original line number Diff line number Diff line
@@ -978,11 +978,14 @@ void dwc3_tx_fifo_resize_request(struct usb_ep *ep, bool qdss_enabled)
	struct dwc3 *dwc = dep->dwc;
	struct dwc3_msm *mdwc = dev_get_drvdata(dwc->dev->parent);

	if (qdss_enabled)
	if (qdss_enabled) {
		dwc->tx_fifo_reduced = true;
		dwc->tx_fifo_size = mdwc->qdss_tx_fifo_size;
	else
	} else {
		dwc->tx_fifo_reduced = false;
		dwc->tx_fifo_size = mdwc->tx_fifo_size;
	}
}
EXPORT_SYMBOL(dwc3_tx_fifo_resize_request);

static void dwc3_restart_usb_work(struct work_struct *w)
+11 −5
Original line number Diff line number Diff line
@@ -230,13 +230,19 @@ int dwc3_gadget_resize_tx_fifos(struct dwc3 *dwc)

		if (dwc->tx_fifo_size &&
			(usb_endpoint_xfer_bulk(dep->endpoint.desc)
				|| usb_endpoint_xfer_isoc(dep->endpoint.desc)))
			|| usb_endpoint_xfer_isoc(dep->endpoint.desc))) {
			/*
			 * Allocate 3KB fifo size for bulk and isochronous TX
			 * endpoints irrespective of speed. For interrupt
			 * endpoint, allocate fifo size of endpoint maxpacket.
			 * endpoints irrespective of speed if tx_fifo is not
			 * reduced. Otherwise allocate 1KB for endpoints in HS
			 * mode and for non burst endpoints in SS mode. For
			 * interrupt ep, allocate fifo size of ep maxpacket.
			 */
			if (!dwc->tx_fifo_reduced)
				tmp = 3 * (1024 + mdwidth);
			else
				tmp = mult * (1024 + mdwidth);
		}

		tmp += mdwidth;