Loading Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +6 −6 Original line number Original line Diff line number Diff line Loading @@ -25,7 +25,7 @@ Optional properties: - clocks : List of phandle and clock specifier pairs - clocks : List of phandle and clock specifier pairs - clock-names : List of clock input name strings sorted in the same - clock-names : List of clock input name strings sorted in the same order as the clocks property. order as the clocks property. - max-clock-frequency-hz : List of maximum operating frequency stored in the same - freq-table-hz : Array of <min max> operating frequencies stored in the same order as the clocks property. If this property is not order as the clocks property. If this property is not defined or a value in the array is "0" then it is assumed defined or a value in the array is "0" then it is assumed that the frequency is set by the parent clock or a that the frequency is set by the parent clock or a Loading @@ -51,7 +51,7 @@ Example: clocks = <&core 0>, <&ref 0>, <&iface 0>; clocks = <&core 0>, <&ref 0>, <&iface 0>; clock-names = "core_clk", "ref_clk", "iface_clk"; clock-names = "core_clk", "ref_clk", "iface_clk"; max-clock-frequency-hz = <100000000 19200000 0>; freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; }; }; ==== MSM UFS platform driver properties ===== ==== MSM UFS platform driver properties ===== Loading arch/arm/boot/dts/qcom/apq8084.dtsi +2 −1 Original line number Original line Diff line number Diff line Loading @@ -2889,7 +2889,8 @@ clock-names = "core_clk_src", "core_clk", "bus_clk", "iface_clk", clock-names = "core_clk_src", "core_clk", "bus_clk", "iface_clk", "ref_clk"; "ref_clk"; max-clock-frequency-hz = <200000000>, <0>, <0>, <0>, <0>; freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>, <0 0>; qcom,msm-bus,name = "ufs1"; qcom,msm-bus,name = "ufs1"; qcom,msm-bus,num-cases = <22>; qcom,msm-bus,num-cases = <22>; Loading drivers/scsi/ufs/ufshcd-pltfrm.c +35 −13 Original line number Original line Diff line number Diff line Loading @@ -62,6 +62,8 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) char *name; char *name; u32 *clkfreq = NULL; u32 *clkfreq = NULL; struct ufs_clk_info *clki; struct ufs_clk_info *clki; int len = 0; size_t sz = 0; if (!np) if (!np) goto out; goto out; Loading @@ -81,39 +83,59 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (cnt <= 0) if (cnt <= 0) goto out; goto out; clkfreq = kzalloc(cnt * sizeof(*clkfreq), GFP_KERNEL); if (!of_get_property(np, "freq-table-hz", &len)) { dev_info(dev, "freq-table-hz property not specified\n"); goto out; } if (len <= 0) goto out; sz = len / sizeof(*clkfreq); if (sz != 2 * cnt) { dev_err(dev, "%s len mismatch\n", "freq-table-hz"); ret = -EINVAL; goto out; } clkfreq = devm_kzalloc(dev, sz * sizeof(*clkfreq), GFP_KERNEL); if (!clkfreq) { if (!clkfreq) { dev_err(dev, "%s: no memory\n", "freq-table-hz"); ret = -ENOMEM; ret = -ENOMEM; dev_err(dev, "%s: memory alloc failed\n", __func__); goto out; goto out; } } ret = of_property_read_u32_array(np, ret = of_property_read_u32_array(np, "freq-table-hz", "max-clock-frequency-hz", clkfreq, cnt); clkfreq, sz); if (ret && (ret != -EINVAL)) { if (ret && (ret != -EINVAL)) { dev_err(dev, "%s: invalid max-clock-frequency-hz property, %d\n", dev_err(dev, "%s: error reading array %d\n", __func__, ret); "freq-table-hz", ret); goto out; goto free_clkfreq; } } for (i = 0; i < cnt; i++) { for (i = 0; i < sz; i += 2) { ret = of_property_read_string_index(np, ret = of_property_read_string_index(np, "clock-names", i, (const char **)&name); "clock-names", i/2, (const char **)&name); if (ret) if (ret) goto out; goto free_clkfreq; clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); if (!clki) { if (!clki) { ret = -ENOMEM; ret = -ENOMEM; goto out; goto free_clkfreq; } } clki->max_freq = clkfreq[i]; clki->min_freq = clkfreq[i]; clki->max_freq = clkfreq[i+1]; clki->name = kstrdup(name, GFP_KERNEL); clki->name = kstrdup(name, GFP_KERNEL); dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", clki->min_freq, clki->max_freq, clki->name); list_add_tail(&clki->list, &hba->clk_list_head); list_add_tail(&clki->list, &hba->clk_list_head); } } out: free_clkfreq: kfree(clkfreq); kfree(clkfreq); out: return ret; return ret; } } Loading drivers/scsi/ufs/ufshcd.h +2 −0 Original line number Original line Diff line number Diff line Loading @@ -241,6 +241,7 @@ enum ts_types { * @clk: clock node * @clk: clock node * @name: clock name * @name: clock name * @max_freq: maximum frequency supported by the clock * @max_freq: maximum frequency supported by the clock * @min_freq: min frequency that can be used for clock scaling * @enabled: variable to check against multiple enable/disable * @enabled: variable to check against multiple enable/disable */ */ struct ufs_clk_info { struct ufs_clk_info { Loading @@ -248,6 +249,7 @@ struct ufs_clk_info { struct clk *clk; struct clk *clk; const char *name; const char *name; u32 max_freq; u32 max_freq; u32 min_freq; bool enabled; bool enabled; }; }; Loading Loading
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt +6 −6 Original line number Original line Diff line number Diff line Loading @@ -25,7 +25,7 @@ Optional properties: - clocks : List of phandle and clock specifier pairs - clocks : List of phandle and clock specifier pairs - clock-names : List of clock input name strings sorted in the same - clock-names : List of clock input name strings sorted in the same order as the clocks property. order as the clocks property. - max-clock-frequency-hz : List of maximum operating frequency stored in the same - freq-table-hz : Array of <min max> operating frequencies stored in the same order as the clocks property. If this property is not order as the clocks property. If this property is not defined or a value in the array is "0" then it is assumed defined or a value in the array is "0" then it is assumed that the frequency is set by the parent clock or a that the frequency is set by the parent clock or a Loading @@ -51,7 +51,7 @@ Example: clocks = <&core 0>, <&ref 0>, <&iface 0>; clocks = <&core 0>, <&ref 0>, <&iface 0>; clock-names = "core_clk", "ref_clk", "iface_clk"; clock-names = "core_clk", "ref_clk", "iface_clk"; max-clock-frequency-hz = <100000000 19200000 0>; freq-table-hz = <100000000 200000000>, <0 0>, <0 0>; }; }; ==== MSM UFS platform driver properties ===== ==== MSM UFS platform driver properties ===== Loading
arch/arm/boot/dts/qcom/apq8084.dtsi +2 −1 Original line number Original line Diff line number Diff line Loading @@ -2889,7 +2889,8 @@ clock-names = "core_clk_src", "core_clk", "bus_clk", "iface_clk", clock-names = "core_clk_src", "core_clk", "bus_clk", "iface_clk", "ref_clk"; "ref_clk"; max-clock-frequency-hz = <200000000>, <0>, <0>, <0>, <0>; freq-table-hz = <100000000 200000000>, <0 0>, <0 0>, <0 0>, <0 0>; qcom,msm-bus,name = "ufs1"; qcom,msm-bus,name = "ufs1"; qcom,msm-bus,num-cases = <22>; qcom,msm-bus,num-cases = <22>; Loading
drivers/scsi/ufs/ufshcd-pltfrm.c +35 −13 Original line number Original line Diff line number Diff line Loading @@ -62,6 +62,8 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) char *name; char *name; u32 *clkfreq = NULL; u32 *clkfreq = NULL; struct ufs_clk_info *clki; struct ufs_clk_info *clki; int len = 0; size_t sz = 0; if (!np) if (!np) goto out; goto out; Loading @@ -81,39 +83,59 @@ static int ufshcd_parse_clock_info(struct ufs_hba *hba) if (cnt <= 0) if (cnt <= 0) goto out; goto out; clkfreq = kzalloc(cnt * sizeof(*clkfreq), GFP_KERNEL); if (!of_get_property(np, "freq-table-hz", &len)) { dev_info(dev, "freq-table-hz property not specified\n"); goto out; } if (len <= 0) goto out; sz = len / sizeof(*clkfreq); if (sz != 2 * cnt) { dev_err(dev, "%s len mismatch\n", "freq-table-hz"); ret = -EINVAL; goto out; } clkfreq = devm_kzalloc(dev, sz * sizeof(*clkfreq), GFP_KERNEL); if (!clkfreq) { if (!clkfreq) { dev_err(dev, "%s: no memory\n", "freq-table-hz"); ret = -ENOMEM; ret = -ENOMEM; dev_err(dev, "%s: memory alloc failed\n", __func__); goto out; goto out; } } ret = of_property_read_u32_array(np, ret = of_property_read_u32_array(np, "freq-table-hz", "max-clock-frequency-hz", clkfreq, cnt); clkfreq, sz); if (ret && (ret != -EINVAL)) { if (ret && (ret != -EINVAL)) { dev_err(dev, "%s: invalid max-clock-frequency-hz property, %d\n", dev_err(dev, "%s: error reading array %d\n", __func__, ret); "freq-table-hz", ret); goto out; goto free_clkfreq; } } for (i = 0; i < cnt; i++) { for (i = 0; i < sz; i += 2) { ret = of_property_read_string_index(np, ret = of_property_read_string_index(np, "clock-names", i, (const char **)&name); "clock-names", i/2, (const char **)&name); if (ret) if (ret) goto out; goto free_clkfreq; clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); clki = devm_kzalloc(dev, sizeof(*clki), GFP_KERNEL); if (!clki) { if (!clki) { ret = -ENOMEM; ret = -ENOMEM; goto out; goto free_clkfreq; } } clki->max_freq = clkfreq[i]; clki->min_freq = clkfreq[i]; clki->max_freq = clkfreq[i+1]; clki->name = kstrdup(name, GFP_KERNEL); clki->name = kstrdup(name, GFP_KERNEL); dev_dbg(dev, "%s: min %u max %u name %s\n", "freq-table-hz", clki->min_freq, clki->max_freq, clki->name); list_add_tail(&clki->list, &hba->clk_list_head); list_add_tail(&clki->list, &hba->clk_list_head); } } out: free_clkfreq: kfree(clkfreq); kfree(clkfreq); out: return ret; return ret; } } Loading
drivers/scsi/ufs/ufshcd.h +2 −0 Original line number Original line Diff line number Diff line Loading @@ -241,6 +241,7 @@ enum ts_types { * @clk: clock node * @clk: clock node * @name: clock name * @name: clock name * @max_freq: maximum frequency supported by the clock * @max_freq: maximum frequency supported by the clock * @min_freq: min frequency that can be used for clock scaling * @enabled: variable to check against multiple enable/disable * @enabled: variable to check against multiple enable/disable */ */ struct ufs_clk_info { struct ufs_clk_info { Loading @@ -248,6 +249,7 @@ struct ufs_clk_info { struct clk *clk; struct clk *clk; const char *name; const char *name; u32 max_freq; u32 max_freq; u32 min_freq; bool enabled; bool enabled; }; }; Loading