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Commit f0e02fc7 authored by Santosh Mardi's avatar Santosh Mardi
Browse files

ASoC: msm8x16-wcd: add mclk and pdm ctl register as non cacheable. 



Update the codec register cacheable array with MCLK and PDM
control register.

CRs-Fixed: 644185
Change-Id: I1025839452755f4cc53c310ee0e59fae570227d4
Signed-off-by: default avatarSantosh Mardi <gsantosh@codeaurora.org>
parent cd22aa08

sound/soc/codecs/msm8x16-wcd-tables.c

+2 −0
Original line number Diff line number Diff line
@@ -286,6 +286,8 @@ const u8 msm8x16_wcd_reg_readonly[MSM8X16_WCD_CACHE_SIZE] = { 
		[MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG] = 1,

		[MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL] = 1,

		[MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL] = 1,

		[MSM8X16_WCD_A_CDC_CLK_MCLK_CTL] = 1,

		[MSM8X16_WCD_A_CDC_CLK_PDM_CTL] = 1,

};

const u8 msm8x16_wcd_reset_reg_defaults[MSM8X16_WCD_CACHE_SIZE] = {

		[MSM8X16_WCD_A_DIGITAL_REVISION1] =

sound/soc/codecs/msm8x16-wcd.c

+0 −5
Original line number Diff line number Diff line
@@ -2837,16 +2837,11 @@ static int modem_state_callback(struct notifier_block *nb, unsigned long value, 
{

	bool timedout;

	unsigned long timeout;

	static bool booted_once;



	if (value == SUBSYS_BEFORE_SHUTDOWN)

		msm8x16_wcd_device_down(registered_codec);

	else if (value == SUBSYS_AFTER_POWERUP) {



		if (!booted_once) {

			booted_once = true;

			return NOTIFY_OK;

		}

		dev_dbg(registered_codec->dev,

			"ADSP is about to power up. bring up codec\n");