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Commit ef3801c2 authored by Lucille Sylvester's avatar Lucille Sylvester
Browse files

ARM: dt: msm8926v2: Match clockplan frequencies



GPU turbo frequency and BIMC frequencies have changed in v2.
Modify the dtsi file to match v2 and update the GPU clock plan
there.

Change-Id: I5ec79f4faac83d524c393765cec6950f71a1fbf4
CRs-fixed: 605171
Signed-off-by: default avatarLucille Sylvester <lsylvest@codeaurora.org>
parent 16103798
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+49 −0
Original line number Diff line number Diff line
@@ -42,3 +42,52 @@
	qcom,vdd-mx-vmin-method = <4>;
	qcom,vdd-mx-corner-map = <1050000 1150000 1280000>;
};

&msm_gpu {
	/* Updated chip ID */
	qcom,chipid = <0x03000512>;

	/* Bus Scale Settings */
	qcom,msm-bus,num-cases = <4>;
	qcom,msm-bus,vectors-KBps =
		<26 512 0 0>, <89 604 0 0>,
		<26 512 0 1800000>, <89 604 0 3200000>,
		<26 512 0 3600000>, <89 604 0 5120000>,
		<26 512 0 4800000>, <89 604 0 6400000>;

	/* Power levels */
	qcom,gpu-pwrlevels {
		#address-cells = <1>;
		#size-cells = <0>;

		compatible = "qcom,gpu-pwrlevels";

		qcom,gpu-pwrlevel@0 {
			reg = <0>;
			qcom,gpu-freq = <500000000>;
			qcom,bus-freq = <3>;
			qcom,io-fraction = <0>;
		};

		qcom,gpu-pwrlevel@1 {
			reg = <1>;
			qcom,gpu-freq = <320000000>;
			qcom,bus-freq = <2>;
			qcom,io-fraction = <33>;
		};

		qcom,gpu-pwrlevel@2 {
			reg = <2>;
			qcom,gpu-freq = <200000000>;
			qcom,bus-freq = <1>;
			qcom,io-fraction = <100>;
		};

		qcom,gpu-pwrlevel@3 {
			reg = <3>;
			qcom,gpu-freq = <19000000>;
			qcom,bus-freq = <0>;
			qcom,io-fraction = <0>;
		};
	};
};