ARM: dts: msm: Change HSIC ITC from 3 (1ms) to 0 (125u) for MDM9625



This is the optimal value that is already used in release branches.

Change-Id: I4883517020ebbf3e7cd6fbb4785af0625db83ba5
Signed-off-by: Amit Blay <ablay@codeaurora.org>

parent b3511c95

arch/arm/boot/dts/msm9625.dtsi

+0 −1

Original line number	Original line	Diff line number	Diff line
	@@ -193,7 +193,6 @@
	qcom,pool-64-bit-align;		qcom,pool-64-bit-align;
	qcom,enable-hbm;		qcom,enable-hbm;
	hsic,consider-ipa-handshake;		hsic,consider-ipa-handshake;
	hsic,log2-itc = <3>;
	qcom,ahb-async-bridge-bypass;		qcom,ahb-async-bridge-bypass;
	hsic,disable-cerr;		hsic,disable-cerr;
	};		};